Add improvements to the Module Debugger

[waielal]

• Fix: dragging ignores scroll position
  When the module debugger is scrolled to the right and an aggregated input is resized, the selected value jumps to the left because it does not account for the scroll offset.

• Add support for recognizing X and Z values
  Currently the module debugger assumes that all signals are 0 or 1. Verilog also works with X and Z which led to weird behavior in the debugger when outputs/wires where not driven and registers where not initialized.
  For this the value types where changed from numbers to strings and a simple upgrade method was added to convert older .dbgmodule files.

• Add support for displaying registers and wires
  The module debugger currently lackes the ability to debug wires and registers. This PR allows registers and wires to be marked as debug and they will be shown below the outputs.
  Example:

module dff(input clk, input d, output o);
    (* lc_debug *)
    reg r = 0;
    always @(posedge clk) r <= d;
    assign o = r;
endmodule

[lushaylabs]

Wow, this is really cool, I didn't know you could $display nested wires I had been thinking that it would require a rewrite to work with VCD files for that.

I have been playing with the module debugger with your improvements and everything looks great.

You can merge this and I will create a new release.

[waielal]

@lushaylabs i don't have any write access to merge the RP.