Fix SPI configuration for ESP32C3 and ESP32S2

[arktrin]

ESP32-C3 and ESP32-S2 don't have VSPI or HSPI. Also ESP32-C3 don't have any specific name for SPIs.

[C47D]

Thanks for the request @arktrin, it does look good to me, I've also requested a review from @tore-espressif .

[tore-espressif]

Hello @arktrin , thank you very much for your contribution.

Yes, the SPI naming is a little messy. I think we might unify it across targets (esp32, s2, s3, c3...) and use basic SPI names.
Because, the already deprecated prefixed SPI names (HSPI, VSPI, FSPI) are for historical reasons defined only for esp32 and esp32s2, see https://github.com/espressif/esp-idf/blob/master/components/hal/include/hal/spi_types.h#L24

This would make it future-proof and a lot easier in menuconfig .

Let me know what you think

[arktrin]

Hello @tore-espressif ! I do agree that SPI names (HSPI, VSPI, FSPI) are kind of confusing. So you won't approve my pull request? I did not get it :) Despite of .../hal/spi_types.h I still cannot find any reference on HSPI for ESP32-S2 in the datasheet.

[tore-espressif]

Hi, thanks for the quick response.

Yeah, I wouldn't recommend merging in this form. So the question is whether you are willing to 'bring this to perfection' (using SPIx_HOST macros, OR I should take over and finish it :)

cc @C47D

[arktrin]

Ok, I will do it.

[arktrin]

@tore-espressif I've replaced specific SPI names with SPIx_HOST. Tested on my ESP32-C3 + ST7789 display board.

[tore-espressif]

Great work, let's wait for @C47D and we can merge.

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@C47D : In retrospect, the idea with develop branch has not really filled up it expectations, as most PRs from community target master, which created conflicts between master and develop branches. I think we can merge develop into master and abandon the idea. What is your opinion?

[C47D]

@tore-espressif I agree, I was asking @kisvegabor about the same thing last weekend.

Some of the commits that went into master I was able to cherry pick them into devel, but not all. I think we could try the trunk based development technique as we now, thanks to your work, have some kind of CI. Should we create a ticket for this (merging devel into master)?

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@arktrin changes look good, we can merge. Can you merge it @tore-espressif?

[tore-espressif]

Created #146 to track this.

Merging now

[tore-espressif]

This breaks scenario when SPI is shared for display and touch. (some HSPI and VSPI macros were not renamed)
I'll prepare a hotfix in #147

[arktrin]

Looks like #147 is not going to be happened. I can try to fix here other HSPI and VSPI macros issue. Will it work as previously when PR is already merged and closed? Or should open new PR ?

[tore-espressif]

We can cherry-pick this commit d0eca96 in new PR

[arktrin]

Looks like d0eca96 is doing well. So I don't think my help will be needed right now. I don't understand what is going on with #147.

[arktrin]

Well, this story is still not finished yet :(
As of ESP32-C3 datasheet v1.1 (page 20):

ESP32-C3 features three SPI interfaces (SPI0, SPI1, and SPI2). 
SPI0 and SPI1 can only be configured to operate in SPI memory mode,
while SPI2 can be configured to operate in both SPI memory and general-purpose SPI modes.

As of online documentation on ESP32-C3:

ESP32-C3 integrates 3 SPI peripherals.
SPI0 and SPI1 are used internally to access the ESP32-C3’s attached flash memory. 
Both controllers share the same SPI bus signals, and there is an arbiter to determine 
which can access the bus. Currently, SPI Master driver does not support SPI1 bus.

So at least there is no such thing as SPI3 and SPI3_HOST for ESP32-C3, though online docs have this somehow:

enum spi_host_device_t
Enum with the three SPI peripherals that are software-accessible in it.
Values:
SPI1_HOST = 0
SPI1.
SPI2_HOST = 1
SPI2.
SPI3_HOST = 2
SPI3.

As of spi_types.h from esp-idf there is no such thing as SPI0 or SPI0_HOST.

And definitely SPI1 can't work as a general purpose SPI controller now.

Sorry for not testing all the cases, but please don't revert this PR.

[C47D]

Don't worry, thanks for reporting the problem, so if I understand it correctly, the C3 only have one SPI (SPI2) for user usage?

[arktrin]

C3 only have one SPI (SPI2) for user usage?

Yeah, looks like that. I've tried to set SPI3_HOST for SPI bus and got:

E (369) spi: spi_bus_initialize(755): invalid host_id

I wonder where is SPI0_HOST or something related to SPI0 for ESP32-C3.

[C47D]

@arktrin I've created a new issue to keep track of this.