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Add KL25Z upload method support, upconvert ARDUINO form factor (#433)
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* Add KL25Z upload method support, upconvert ARDUINO form factor

* Fix typo
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multiplemonomials authored Jan 31, 2025
1 parent b68997b commit 6184722
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Showing 10 changed files with 222 additions and 94 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -24,6 +24,7 @@ target_sources(mbed-kl25z
mbed_overrides.c
serial_api.c
spi_api.c
clk_freqs.c

device/system_MKL25Z4.c
${STARTUP_FILE}
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73 changes: 34 additions & 39 deletions targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/PinNames.h
Original file line number Diff line number Diff line change
Expand Up @@ -195,55 +195,50 @@ typedef enum {
PTE30 = 0x4078,
PTE31 = 0x407c,

LED_RED = PTB18,
LED_GREEN = PTB19,
LED_BLUE = PTD1,

// mbed original LED naming
LED1 = LED_RED,
LED2 = LED_GREEN,
LED3 = LED_BLUE,
LED4 = LED_BLUE,

// USB Pins
CONSOLE_TX = PTA2,
CONSOLE_RX = PTA1,

#ifdef TARGET_FF_ARDUINO_UNO
// Arduino Headers
D0 = PTA1,
D1 = PTA2,
D2 = PTD4,
D3 = PTA12,
D4 = PTA4,
D5 = PTA5,
D6 = PTC8,
D7 = PTC9,
D8 = PTA13,
D9 = PTD5,
D10 = PTD0,
D11 = PTD2,
D12 = PTD3,
D13 = PTD1,
D14 = PTE0,
D15 = PTE1,

A0 = PTB0,
A1 = PTB1,
A2 = PTB2,
A3 = PTB3,
A4 = PTC2,
A5 = PTC1,

I2C_SCL = D15,
I2C_SDA = D14,

TSI_ELEC0 = PTB16,
TSI_ELEC1 = PTB17,
ARDUINO_UNO_D0 = PTA1,
ARDUINO_UNO_D1 = PTA2,
ARDUINO_UNO_D2 = PTD4,
ARDUINO_UNO_D3 = PTA12,
ARDUINO_UNO_D4 = PTA4,
ARDUINO_UNO_D5 = PTA5,
ARDUINO_UNO_D6 = PTC8,
ARDUINO_UNO_D7 = PTC9,
ARDUINO_UNO_D8 = PTA13,
ARDUINO_UNO_D9 = PTD5,
ARDUINO_UNO_D10 = PTD0,
ARDUINO_UNO_D11 = PTD2,
ARDUINO_UNO_D12 = PTD3,
ARDUINO_UNO_D13 = PTD1,
ARDUINO_UNO_D14 = PTE0,
ARDUINO_UNO_D15 = PTE1,

ARDUINO_UNO_A0 = PTB0,
ARDUINO_UNO_A1 = PTB1,
ARDUINO_UNO_A2 = PTB2,
ARDUINO_UNO_A3 = PTB3,
ARDUINO_UNO_A4 = PTC2,
ARDUINO_UNO_A5 = PTC1,
#endif

// Not connected
NC = (int)0xFFFFFFFF
} PinName;

// LEDs -------------------------------
#define LED1 PTB18 // LED_RED
#define LED2 PTB19 // LED_BLUE
#define LED3 PTD1 // LED_GREEN

// Touch Sensor Pins ------------------
#define TSI_ELEC0 PTB16
#define TSI_ELEC1 PTB17

/* PullDown not available for KL25 */
typedef enum {
PullNone = 0,
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* Copyright (c) 2006-2013 ARM Limited
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
Expand All @@ -14,56 +14,21 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_CLK_FREQS_H
#define MBED_CLK_FREQS_H

#ifdef __cplusplus
extern "C" {
#endif

#include "PeripheralPins.h"

//Get the peripheral bus clock frequency
static inline uint32_t bus_frequency(void) {
return (SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1));
}

#if defined(TARGET_KL43Z)

static inline uint32_t extosc_frequency(void) {
return CPU_XTAL_CLK_HZ;
}

static inline uint32_t fastirc_frequency(void) {
return CPU_INT_FAST_CLK_HZ;
}

static inline uint32_t mcgirc_frequency(void) {
uint32_t mcgirc_clock = 0;

if (MCG->C1 & MCG_C1_IREFSTEN_MASK) {
mcgirc_clock = (MCG->C2 & MCG_C2_IRCS_MASK) ? 8000000u : 2000000u;
mcgirc_clock /= 1u + ((MCG->SC & MCG_SC_FCRDIV_MASK) >> MCG_SC_FCRDIV_SHIFT);
mcgirc_clock /= 1u + (MCG->MC & MCG_MC_LIRC_DIV2_MASK);
}

return mcgirc_clock;
}

#else
#include "clk_freqs.h"

//Get external oscillator (crystal) frequency
static uint32_t extosc_frequency(void) {
uint32_t extosc_frequency(void) {
uint32_t MCGClock = SystemCoreClock * (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT));

if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(2)) //MCG clock = external reference clock
return MCGClock;

uint32_t divider, multiplier;
#ifdef MCG_C5_PLLCLKEN0_MASK //PLL available
#ifdef MCG_C5_PLLCLKEN0_MASK //PLL available
if ((MCG->C1 & MCG_C1_CLKS_MASK) == MCG_C1_CLKS(0)) { //PLL/FLL is selected
if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u) { //FLL is selected
#endif
#endif
if ((MCG->S & MCG_S_IREFST_MASK) == 0x0u) { //FLL uses external reference
divider = (uint8_t)(1u << ((MCG->C1 & MCG_C1_FRDIV_MASK) >> MCG_C1_FRDIV_SHIFT));
if ((MCG->C2 & MCG_C2_RANGE0_MASK) != 0x0u)
Expand Down Expand Up @@ -99,14 +64,14 @@ static uint32_t extosc_frequency(void) {

return MCGClock * divider / multiplier;
}
#ifdef MCG_C5_PLLCLKEN0_MASK
#ifdef MCG_C5_PLLCLKEN0_MASK
} else { //PLL is selected
divider = (1u + (MCG->C5 & MCG_C5_PRDIV0_MASK));
multiplier = ((MCG->C6 & MCG_C6_VDIV0_MASK) + 24u);
return MCGClock * divider / multiplier;
}
}
#endif
#endif

//In all other cases either there is no crystal or we cannot determine it
//For example when the FLL is running on the internal reference, and there is also an
Expand All @@ -115,31 +80,24 @@ static uint32_t extosc_frequency(void) {
}

//Get MCG PLL/2 or FLL frequency, depending on which one is active, sets PLLFLLSEL bit
static uint32_t mcgpllfll_frequency(void) {
uint32_t mcgpllfll_frequency(void) {
if ((MCG->C1 & MCG_C1_CLKS_MASK) != MCG_C1_CLKS(0)) //PLL/FLL is not selected
return 0;

uint32_t MCGClock = SystemCoreClock * (1u + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT));
#ifdef MCG_C5_PLLCLKEN0_MASK
#ifdef MCG_C5_PLLCLKEN0_MASK
if ((MCG->C6 & MCG_C6_PLLS_MASK) == 0x0u) { //FLL is selected
SIM->SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK; //MCG peripheral clock is FLL output
#endif
#endif
return MCGClock;
#ifdef MCG_C5_PLLCLKEN0_MASK
#ifdef MCG_C5_PLLCLKEN0_MASK
} else { //PLL is selected
SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK; //MCG peripheral clock is PLL output
return (MCGClock >> 1);
}
#endif
#endif

//It is possible the SystemCoreClock isn't running on the PLL, and the PLL is still active
//for the peripherals, this is however an unlikely setup
}

#endif

#ifdef __cplusplus
}
#endif

#endif
41 changes: 41 additions & 0 deletions targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/clk_freqs.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,41 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_CLK_FREQS_H
#define MBED_CLK_FREQS_H

#ifdef __cplusplus
extern "C" {
#endif

#include "PeripheralPins.h"

//Get the peripheral bus clock frequency
static inline uint32_t bus_frequency(void) {
return (SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1));
}

//Get external oscillator (crystal) frequency
uint32_t extosc_frequency(void);

//Get MCG PLL/2 or FLL frequency, depending on which one is active, sets PLLFLLSEL bit
uint32_t mcgpllfll_frequency(void);

#ifdef __cplusplus
}
#endif

#endif
Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,7 @@ target_sources(mbed-kl46z
mbed_overrides.c
serial_api.c
spi_api.c
clk_freqs.c

device/system_MKL46Z4.c
${STARTUP_FILE}
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28 changes: 28 additions & 0 deletions targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/clk_freqs.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,28 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/

uint32_t mcgirc_frequency(void) {
uint32_t mcgirc_clock = 0;

if (MCG->C1 & MCG_C1_IREFSTEN_MASK) {
mcgirc_clock = (MCG->C2 & MCG_C2_IRCS_MASK) ? 8000000u : 2000000u;
mcgirc_clock /= 1u + ((MCG->SC & MCG_SC_FCRDIV_MASK) >> MCG_SC_FCRDIV_SHIFT);
mcgirc_clock /= 1u + (MCG->MC & MCG_MC_LIRC_DIV2_MASK);
}

return mcgirc_clock;
}
45 changes: 45 additions & 0 deletions targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/clk_freqs.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,45 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_CLK_FREQS_H
#define MBED_CLK_FREQS_H

#ifdef __cplusplus
extern "C" {
#endif

#include "PeripheralPins.h"

//Get the peripheral bus clock frequency
static inline uint32_t bus_frequency(void) {
return (SystemCoreClock / (((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV4_MASK) >> SIM_CLKDIV1_OUTDIV4_SHIFT) + 1));
}

static inline uint32_t extosc_frequency(void) {
return CPU_XTAL_CLK_HZ;
}

static inline uint32_t fastirc_frequency(void) {
return CPU_INT_FAST_CLK_HZ;
}

uint32_t mcgirc_frequency(void);

#ifdef __cplusplus
}
#endif

#endif
2 changes: 1 addition & 1 deletion targets/targets.json5
Original file line number Diff line number Diff line change
Expand Up @@ -521,7 +521,7 @@ mode is recommended for target MCUs with small amounts of flash and RAM.",
// Freescale (now NXP) Kinetis Targets -----------------------------------------------------------------------------
"KL25Z": {
"supported_form_factors": [
"ARDUINO"
"ARDUINO_UNO"
],
"core": "Cortex-M0+",
"extra_labels": [
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