CPUの創りかたで作成するCPU TD4をverilog HDLで作成したもの
https://qiita.com/Hiroki11x/items/ec8ce716d3117360313f
$ cd td4
$ iverilog -o td4_sim.out td4.v td4_sim.v data_selector.v decoder.v alu.v
$ vvp td4_sim.out
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