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lenovo-NE10xx: Clean up U-Boot bootup messages
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This is to clean up some boot messages on Lenovo NE1032, NE1032T,
NE1072T platforms.

Signed-off-by: Curt Brune <[email protected]>
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psarker authored and Curt Brune committed Aug 8, 2017
1 parent 121cc7d commit f19bb01
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Showing 6 changed files with 147 additions and 0 deletions.
48 changes: 48 additions & 0 deletions machine/lenovo/lenovo_ne1032/u-boot/01-uboot-msg-cleanup.patch
Original file line number Diff line number Diff line change
@@ -0,0 +1,48 @@
diff --git a/board/lenovo/lenovo_ne10x2/tlb.c b/board/lenovo/lenovo_ne10x2/tlb.c
index 44f6aa3..939d20c 100644
--- a/board/lenovo/lenovo_ne10x2/tlb.c
+++ b/board/lenovo/lenovo_ne10x2/tlb.c
@@ -54,12 +54,12 @@ struct fsl_e_tlb_entry tlb_table[] = {

#ifndef CONFIG_SPL_BUILD
/* *I*G* - PCI */
- SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE2_MEM_VIRT, CONFIG_SYS_PCIE2_MEM_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 3, BOOKE_PAGESZ_1G, 1),

/* *I*G* - PCI I/O */
- SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE2_IO_VIRT, CONFIG_SYS_PCIE2_IO_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 4, BOOKE_PAGESZ_256K, 1),

diff --git a/include/configs/lenovo_ne10x2.h b/include/configs/lenovo_ne10x2.h
index 49d2ac8..e226299 100644
--- a/include/configs/lenovo_ne10x2.h
+++ b/include/configs/lenovo_ne10x2.h
@@ -38,10 +38,10 @@
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_PCI /* Enable PCI/PCIE */
#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_PCIE1 /* PCIE controler 1 */
+#undef CONFIG_PCIE1 /* PCIE controler 1 */
#define CONFIG_PCIE2 /* PCIE controler 2 */
-#define CONFIG_PCIE3 /* PCIE controler 3 */
-#define CONFIG_PCIE4 /* PCIE controler 4 */
+#undef CONFIG_PCIE3 /* PCIE controler 3 */
+#undef CONFIG_PCIE4 /* PCIE controler 4 */

#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
@@ -593,10 +593,6 @@
"bootargs=root=/dev/ram rw console=ttyS0,11520 quiet\0" \
"consoledev=ttyS0\0" \
"ethaddr=00:11:22:33:44:00\0" \
- "eth1addr=00:11:22:33:44:11\0" \
- "eth2addr=00:11:22:33:44:22\0" \
- "eth3addr=00:11:22:33:44:33\0" \
- "eth4addr=00:11:22:33:44:44\0" \
"onie_start=0xefaa0000\0" \
"onie_sz.b=0x004a0000\0"

1 change: 1 addition & 0 deletions machine/lenovo/lenovo_ne1032/u-boot/series
Original file line number Diff line number Diff line change
@@ -1 +1,2 @@
platform-lenovo-ne1032.patch
01-uboot-msg-cleanup.patch
48 changes: 48 additions & 0 deletions machine/lenovo/lenovo_ne1032t/u-boot/01-uboot-msg-cleanup.patch
Original file line number Diff line number Diff line change
@@ -0,0 +1,48 @@
diff --git a/board/lenovo/lenovo_ne10x2/tlb.c b/board/lenovo/lenovo_ne10x2/tlb.c
index 44f6aa3..939d20c 100644
--- a/board/lenovo/lenovo_ne10x2/tlb.c
+++ b/board/lenovo/lenovo_ne10x2/tlb.c
@@ -54,12 +54,12 @@ struct fsl_e_tlb_entry tlb_table[] = {

#ifndef CONFIG_SPL_BUILD
/* *I*G* - PCI */
- SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE2_MEM_VIRT, CONFIG_SYS_PCIE2_MEM_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 3, BOOKE_PAGESZ_1G, 1),

/* *I*G* - PCI I/O */
- SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE2_IO_VIRT, CONFIG_SYS_PCIE2_IO_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 4, BOOKE_PAGESZ_256K, 1),

diff --git a/include/configs/lenovo_ne10x2.h b/include/configs/lenovo_ne10x2.h
index 49d2ac8..e226299 100644
--- a/include/configs/lenovo_ne10x2.h
+++ b/include/configs/lenovo_ne10x2.h
@@ -38,10 +38,10 @@
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_PCI /* Enable PCI/PCIE */
#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_PCIE1 /* PCIE controler 1 */
+#undef CONFIG_PCIE1 /* PCIE controler 1 */
#define CONFIG_PCIE2 /* PCIE controler 2 */
-#define CONFIG_PCIE3 /* PCIE controler 3 */
-#define CONFIG_PCIE4 /* PCIE controler 4 */
+#undef CONFIG_PCIE3 /* PCIE controler 3 */
+#undef CONFIG_PCIE4 /* PCIE controler 4 */

#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
@@ -593,10 +593,6 @@
"bootargs=root=/dev/ram rw console=ttyS0,11520 quiet\0" \
"consoledev=ttyS0\0" \
"ethaddr=00:11:22:33:44:00\0" \
- "eth1addr=00:11:22:33:44:11\0" \
- "eth2addr=00:11:22:33:44:22\0" \
- "eth3addr=00:11:22:33:44:33\0" \
- "eth4addr=00:11:22:33:44:44\0" \
"onie_start=0xefaa0000\0" \
"onie_sz.b=0x004a0000\0"

1 change: 1 addition & 0 deletions machine/lenovo/lenovo_ne1032t/u-boot/series
Original file line number Diff line number Diff line change
@@ -1 +1,2 @@
platform-lenovo-ne1032t.patch
01-uboot-msg-cleanup.patch
48 changes: 48 additions & 0 deletions machine/lenovo/lenovo_ne1072t/u-boot/01-uboot-msg-cleanup.patch
Original file line number Diff line number Diff line change
@@ -0,0 +1,48 @@
diff --git a/board/lenovo/lenovo_ne10x2/tlb.c b/board/lenovo/lenovo_ne10x2/tlb.c
index 44f6aa3..939d20c 100644
--- a/board/lenovo/lenovo_ne10x2/tlb.c
+++ b/board/lenovo/lenovo_ne10x2/tlb.c
@@ -54,12 +54,12 @@ struct fsl_e_tlb_entry tlb_table[] = {

#ifndef CONFIG_SPL_BUILD
/* *I*G* - PCI */
- SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS,
+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE2_MEM_VIRT, CONFIG_SYS_PCIE2_MEM_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 3, BOOKE_PAGESZ_1G, 1),

/* *I*G* - PCI I/O */
- SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_VIRT, CONFIG_SYS_PCIE1_IO_PHYS,
+ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE2_IO_VIRT, CONFIG_SYS_PCIE2_IO_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 4, BOOKE_PAGESZ_256K, 1),

diff --git a/include/configs/lenovo_ne10x2.h b/include/configs/lenovo_ne10x2.h
index 49d2ac8..e226299 100644
--- a/include/configs/lenovo_ne10x2.h
+++ b/include/configs/lenovo_ne10x2.h
@@ -38,10 +38,10 @@
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_PCI /* Enable PCI/PCIE */
#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_PCIE1 /* PCIE controler 1 */
+#undef CONFIG_PCIE1 /* PCIE controler 1 */
#define CONFIG_PCIE2 /* PCIE controler 2 */
-#define CONFIG_PCIE3 /* PCIE controler 3 */
-#define CONFIG_PCIE4 /* PCIE controler 4 */
+#undef CONFIG_PCIE3 /* PCIE controler 3 */
+#undef CONFIG_PCIE4 /* PCIE controler 4 */

#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
@@ -593,10 +593,6 @@
"bootargs=root=/dev/ram rw console=ttyS0,11520 quiet\0" \
"consoledev=ttyS0\0" \
"ethaddr=00:11:22:33:44:00\0" \
- "eth1addr=00:11:22:33:44:11\0" \
- "eth2addr=00:11:22:33:44:22\0" \
- "eth3addr=00:11:22:33:44:33\0" \
- "eth4addr=00:11:22:33:44:44\0" \
"onie_start=0xefaa0000\0" \
"onie_sz.b=0x004a0000\0"

1 change: 1 addition & 0 deletions machine/lenovo/lenovo_ne1072t/u-boot/series
Original file line number Diff line number Diff line change
@@ -1 +1,2 @@
platform-lenovo-ne1072t.patch
01-uboot-msg-cleanup.patch

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