Add some Pseudo Instructions from the ISA and ASM manual #277
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Following up on #276, I've added some pseudo-instructions to the riscv-opcodes repository. This repository is incredibly useful, and I believe that including as much information as possible about the ISA here can enable new use cases in the future.
For example, in the riscv-unified-db project, we utilize this repository to automatically generate the skeletons of the .yaml files. By expanding the details available in this repo, we will be able to generate even more detailed information and I believe that so is the case for more downstream applications.
Below is the full list of the adittions, so far:
mv
not
neg
nop
zext.b
ret
bleu
bgtu
ble
bgt
bgtz
bltz
bgez
blez
bnez
beqz
seqz
snez
sltz
sgtz