[LTD mergeup] Merge commit '2b6ebc0876fead29611560c1c211be49c8d6ff7b'…

… into ltd-17.06

Summary
-------

Another small set of changes, including minor but important fixes for net
and ARM (Cortex-M0).

Upstream Changes
----------------

Net:

- 2b6ebc0 net: tcp: Timeout memory allocations
- bd7d1bd net: http: Avoid unnecessary net_pkt error print
- c9e6ef5 net: http: Use random source port when connecting
- 985d6c3 net: tcp: Limit number of segment retransmissions
- 39e37ab net: ipv6: Skip unknown options in NA message

Samples:

- 3616ec1 samples: net: http_client: Increase the number of buffers
- bad6e28 samples: net: dtls_client: Fix Coverity warning
- 7d13261 samples: net: zperf: Fix llvm compiler warnings
- 7a972c0 samples: mqtt_publisher: Try connecting a few times before giving up

ARM:

- 19dbcff arm: fix k_oops on armv6 with interrupts locked
- a2156fe arm: implement __svc on Cortex M0
- 1084165 arch: arm: Fix compile error on ARMv6-M SoCs with TICKLESS_KERNEL

Boards:

- 5b4867b bbc_microbit: fix 'make debugserver'
- 70b2a57 quark_d2000_crb: increase default stack size

Drivers:

- 7075008 drivers: timer: Fix nRF RTC timer _timer_cycle_get_32
- cced7fd api/spi: Change transceive functions signature

X86:

- b330e0e Revert "x86: call gen_idt with $ZEPHYR_BASE too"

Bluetooth:

- 67faa3f Bluetooth: L2CAP: Remove redundant checks for chan->ops
- 7ac7578 Bluetooth: SDP: Fix possible out of bound memory access
- a3cba8b Bluetooth: shell: Add controller's ticker shell module

Signed-off-by: Ricardo Salveti <[email protected]>

arch/arm/core/cortex_m/vector_table.S

@@ -47,7 +47,7 @@ SECTION_SUBSEC_FUNC(exc_vector_table,_vector_table_section,_vector_table)
     .word __reserved
     .word __reserved
     .word __reserved
-    .word __reserved	/* SVC not used for now (PendSV used instead) */
+    .word __svc
     .word __reserved
 #elif defined(CONFIG_ARMV7_M)
     .word __mpu_fault

arch/arm/core/cortex_m/vector_table.h

@@ -39,6 +39,7 @@ GTEXT(__reset)
 GTEXT(__nmi)
 GTEXT(__hard_fault)
 #if defined(CONFIG_ARMV6_M)
+GTEXT(__svc)
 #elif defined(CONFIG_ARMV7_M)
 GTEXT(__mpu_fault)
 GTEXT(__bus_fault)

arch/arm/core/exc_exit.S

@@ -61,7 +61,12 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, _IntExit)
 #ifdef CONFIG_TICKLESS_KERNEL
     push {lr}
     bl _update_time_slice_before_swap
+#if defined(CONFIG_ARMV6_M)
+    pop {r0}
+    mov lr, r0
+#else
     pop {lr}
+#endif /* CONFIG_ARMV6_M */
 #endif
 
 /**

arch/arm/core/irq_offload.c

@@ -22,9 +22,17 @@ void _irq_do_offload(void)
 
 void irq_offload(irq_offload_routine_t routine, void *parameter)
 {
-	int key;
+#if defined(CONFIG_ARMV6_M) && defined(CONFIG_ASSERT)
+	/* Cortex M0 hardfaults if you make a SVC call with interrupts
+	 * locked.
+	 */
+	unsigned int key;
 
-	key = irq_lock();
+	__asm__ volatile("mrs %0, PRIMASK;" : "=r" (key) : : "memory");
+	__ASSERT(key == 0, "irq_offload called with interrupts locked\n");
+#endif
+
+	k_sched_lock();
 	offload_routine = routine;
 	offload_param = parameter;
 
@@ -34,6 +42,5 @@ void irq_offload(irq_offload_routine_t routine, void *parameter)
 			  : "memory");
 
 	offload_routine = NULL;
-
-	irq_unlock(key);
+	k_sched_unlock();
 }

arch/arm/core/swap.S

@@ -20,12 +20,7 @@
 _ASM_FILE_PROLOGUE
 
 GTEXT(__swap)
-#if defined(CONFIG_ARMV6_M)
-#elif defined(CONFIG_ARMV7_M)
 GTEXT(__svc)
-#else
-#error Unknown ARM architecture
-#endif /* CONFIG_ARMV6_M */
 GTEXT(__pendsv)
 GTEXT(_do_kernel_oops)
 GDATA(_k_neg_eagain)
@@ -217,6 +212,52 @@ _thread_irq_disabled:
     bx lr
 
 #if defined(CONFIG_ARMV6_M)
+SECTION_FUNC(TEXT, __svc)
+    /* Use EXC_RETURN state to find out if stack frame is on the
+     * MSP or PSP
+     */
+    ldr r0, =0x4
+    mov r1, lr
+    tst r1, r0
+    beq _stack_frame_msp
+    mrs r0, PSP
+    bne _stack_frame_endif
+_stack_frame_msp:
+    mrs r0, MSP
+_stack_frame_endif:
+
+    /* Figure out what SVC call number was invoked */
+    ldr r1, [r0, #24]   /* grab address of PC from stack frame */
+    /* SVC is a two-byte instruction, point to it and read  encoding */
+    subs r1, r1, #2
+    ldrb r1, [r1, #0]
+
+   /*
+    * grab service call number:
+    * 1: irq_offload (if configured)
+    * 2: kernel panic or oops (software generated fatal exception)
+    * Planned implementation of system calls for memory protection will
+    * expand this case.
+    */
+
+    cmp r1, #2
+    beq _oops
+
+#if CONFIG_IRQ_OFFLOAD
+    push {lr}
+    blx _irq_do_offload  /* call C routine which executes the offload */
+    pop {r3}
+    mov lr, r3
+#endif
+
+    /* exception return is done in _IntExit() */
+    b _IntExit
+
+_oops:
+    push {lr}
+    blx _do_kernel_oops
+    pop {pc}
+
 #elif defined(CONFIG_ARMV7_M)
 /**
  *

arch/x86/Makefile.idt

@@ -5,7 +5,7 @@ else
 endif
 
 ifeq ($(PREBUILT_HOST_TOOLS),)
-	GENIDT := $(ZEPHYR_BASE)/scripts/gen_idt/gen_idt
+	GENIDT := scripts/gen_idt/gen_idt
 else
 	GENIDT := $(PREBUILT_HOST_TOOLS)/gen_idt
 endif
@@ -29,7 +29,7 @@ quiet_cmd_gen_idt = SIDT    $@
 )
 
 $(GENIDT):
-	$(Q)$(MAKE) $(build)=$(ZEPHYR_BASE)/scripts/gen_idt
+	$(Q)$(MAKE) $(build)=scripts/gen_idt
 
 staticIdt.o: $(PREBUILT_KERNEL) $(GENIDT)
 	$(call cmd,gen_idt)

boards/arm/bbc_microbit/Makefile.board

@@ -1,4 +1,4 @@
 PYOCD_TARGET = nrf51
 FLASH_SCRIPT=pyocd.sh
-
+DEBUG_SCRIPT=pyocd.sh
 export PYOCD_TARGET FLASH_SCRIPT

boards/x86/quark_d2000_crb/quark_d2000_crb_defconfig

@@ -12,5 +12,5 @@ CONFIG_SERIAL=y
 CONFIG_SERIAL_HAS_DRIVER=y
 CONFIG_PRINTK=y
 CONFIG_ISR_STACK_SIZE=256
-CONFIG_MAIN_STACK_SIZE=512
+CONFIG_MAIN_STACK_SIZE=1024
 CONFIG_PINMUX=y

drivers/spi/spi_context.h

@@ -29,13 +29,15 @@ struct spi_context {
 	struct k_poll_signal *signal;
 	bool asynchronous;
 #endif
-	const struct spi_buf **current_tx;
-	struct spi_buf **current_rx;
+	const struct spi_buf *current_tx;
+	size_t tx_count;
+	struct spi_buf *current_rx;
+	size_t rx_count;
 
 	void *tx_buf;
-	u32_t tx_len;
+	size_t tx_len;
 	void *rx_buf;
-	u32_t rx_len;
+	size_t rx_len;
 };
 
 #define SPI_CONTEXT_INIT_LOCK(_data, _ctx_name)				\
@@ -144,36 +146,40 @@ static inline void spi_context_cs_control(struct spi_context *ctx, bool on)
 }
 
 static inline void spi_context_buffers_setup(struct spi_context *ctx,
-					     const struct spi_buf **tx_bufs,
-					     struct spi_buf **rx_bufs,
+					     const struct spi_buf *tx_bufs,
+					     size_t tx_count,
+					     struct spi_buf *rx_bufs,
+					     size_t rx_count,
 					     uint8_t dfs)
 {
-	SYS_LOG_DBG("tx_bufs %p (%p) - rx_bufs %p (%p) - %u",
-		    tx_bufs, tx_bufs ? *tx_bufs : NULL,
-		    rx_bufs, rx_bufs ? *rx_bufs : NULL, dfs);
+	SYS_LOG_DBG("tx_bufs %p (%zu) - rx_bufs %p (%zu) - %u",
+		    tx_bufs, tx_count, rx_bufs, rx_count, dfs);
 
 	ctx->current_tx = tx_bufs;
+	ctx->tx_count = tx_count;
 	ctx->current_rx = rx_bufs;
+	ctx->rx_count = rx_count;
 
-	if (*tx_bufs) {
-		ctx->tx_buf = (*tx_bufs)->buf;
-		ctx->tx_len = (*tx_bufs)->len/dfs;
+	if (tx_bufs) {
+		ctx->tx_buf = tx_bufs->buf;
+		ctx->tx_len = tx_bufs->len / dfs;
 	} else {
 		ctx->tx_buf = NULL;
 		ctx->tx_len = 0;
 	}
 
-	if (*rx_bufs) {
-		ctx->rx_buf = (*rx_bufs)->buf;
-		ctx->rx_len = (*rx_bufs)->len/dfs;
+	if (rx_bufs) {
+		ctx->rx_buf = rx_bufs->buf;
+		ctx->rx_len = rx_bufs->len / dfs;
 	} else {
 		ctx->rx_buf = NULL;
 		ctx->rx_len = 0;
 	}
 
-	SYS_LOG_DBG("current_tx %p, current_rx %p,"
-		    " tx buf/len %p/%u, rx buf/len %p/%u",
-		    ctx->current_tx, ctx->current_rx,
+	SYS_LOG_DBG("current_tx %p (%zu), current_rx %p (%zu),"
+		    " tx buf/len %p/%zu, rx buf/len %p/%zu",
+		    ctx->current_tx, ctx->tx_count,
+		    ctx->current_rx, ctx->rx_count,
 		    ctx->tx_buf, ctx->tx_len, ctx->rx_buf, ctx->rx_len);
 }
 
@@ -187,17 +193,19 @@ void spi_context_update_tx(struct spi_context *ctx, uint8_t dfs)
 	ctx->tx_len--;
 	if (!ctx->tx_len) {
 		ctx->current_tx++;
-		if (*ctx->current_tx) {
-			ctx->tx_buf = (*ctx->current_tx)->buf;
-			ctx->tx_len = (*ctx->current_tx)->len/dfs;
+		ctx->tx_count--;
+
+		if (ctx->tx_count) {
+			ctx->tx_buf = ctx->current_tx->buf;
+			ctx->tx_len = ctx->current_tx->len / dfs;
 		} else {
 			ctx->tx_buf = NULL;
 		}
 	} else if (ctx->tx_buf) {
 		ctx->tx_buf += dfs;
 	}
 
-	SYS_LOG_DBG("tx buf/len %p/%u", ctx->tx_buf, ctx->tx_len);
+	SYS_LOG_DBG("tx buf/len %p/%zu", ctx->tx_buf, ctx->tx_len);
 }
 
 static ALWAYS_INLINE
@@ -216,17 +224,19 @@ void spi_context_update_rx(struct spi_context *ctx, uint8_t dfs)
 	ctx->rx_len--;
 	if (!ctx->rx_len) {
 		ctx->current_rx++;
-		if (*ctx->current_rx) {
-			ctx->rx_buf = (*ctx->current_rx)->buf;
-			ctx->rx_len = (*ctx->current_rx)->len/dfs;
+		ctx->rx_count--;
+
+		if (ctx->rx_count) {
+			ctx->rx_buf = ctx->current_rx->buf;
+			ctx->rx_len = ctx->current_rx->len / dfs;
 		} else {
 			ctx->rx_buf = NULL;
 		}
 	} else if (ctx->rx_buf) {
 		ctx->rx_buf += dfs;
 	}
 
-	SYS_LOG_DBG("rx buf/len %p/%u", ctx->rx_buf, ctx->rx_len);
+	SYS_LOG_DBG("rx buf/len %p/%zu", ctx->rx_buf, ctx->rx_len);
 }
 
 static ALWAYS_INLINE

drivers/spi/spi_dw.c

@@ -251,8 +251,10 @@ static int spi_dw_configure(const struct spi_dw_config *info,
 }
 
 static int transceive(struct spi_config *config,
-		      const struct spi_buf **tx_bufs,
-		      struct spi_buf **rx_bufs,
+		      const struct spi_buf *tx_bufs,
+		      size_t tx_count,
+		      struct spi_buf *rx_bufs,
+		      size_t rx_count,
 		      bool asynchronous,
 		      struct k_poll_signal *signal)
 {
@@ -277,7 +279,8 @@ static int transceive(struct spi_config *config,
 	}
 
 	/* Set buffers info */
-	spi_context_buffers_setup(&spi->ctx, tx_bufs, rx_bufs, spi->dfs);
+	spi_context_buffers_setup(&spi->ctx, tx_bufs, tx_count,
+				  rx_bufs, rx_count, spi->dfs);
 
 	spi->fifo_diff = 0;
 
@@ -317,23 +320,31 @@ static int transceive(struct spi_config *config,
 }
 
 static int spi_dw_transceive(struct spi_config *config,
-			     const struct spi_buf **tx_bufs,
-			     struct spi_buf **rx_bufs)
+			     const struct spi_buf *tx_bufs,
+			     size_t tx_count,
+			     struct spi_buf *rx_bufs,
+			     size_t rx_count)
 {
-	SYS_LOG_DBG("%p, %p, %p", config->dev, tx_bufs, rx_bufs);
+	SYS_LOG_DBG("%p, %p (%zu), %p (%zu)",
+		    config->dev, tx_bufs, tx_count, rx_bufs, rx_count);
 
-	return transceive(config, tx_bufs, rx_bufs, false, NULL);
+	return transceive(config, tx_bufs, tx_count,
+			  rx_bufs, rx_count, false, NULL);
 }
 
 #ifdef CONFIG_POLL
 static int spi_dw_transceive_async(struct spi_config *config,
-				   const struct spi_buf **tx_bufs,
-				   struct spi_buf **rx_bufs,
+				   const struct spi_buf *tx_bufs,
+				   size_t tx_count,
+				   struct spi_buf *rx_bufs,
+				   size_t rx_count,
 				   struct k_poll_signal *async)
 {
-	SYS_LOG_DBG("%p, %p, %p, %p", config->dev, tx_bufs, rx_bufs, async);
+	SYS_LOG_DBG("%p, %p (%zu), %p (%zu), %p",
+		    config->dev, tx_bufs, tx_count, rx_bufs, rx_count, async);
 
-	return transceive(config, tx_bufs, rx_bufs, true, async);
+	return transceive(config, tx_bufs, tx_count,
+			  rx_bufs, rx_count, true, async);
 }
 #endif /* CONFIG_POLL */
 

drivers/timer/nrf_rtc_timer.c

@@ -308,12 +308,21 @@ int _sys_clock_driver_init(struct device *device)
 u32_t _timer_cycle_get_32(void)
 {
 	u32_t elapsed_cycles;
+	u32_t sys_clock_tick_count;
+	u32_t rtc_prev;
+	u32_t rtc_now;
 
-	elapsed_cycles = (RTC_COUNTER -
-			  (_sys_clock_tick_count * RTC_TICKS_PER_SYS_TICK))
-			  & RTC_MASK;
-
-	return (_sys_clock_tick_count * sys_clock_hw_cycles_per_tick) +
+	rtc_now = RTC_COUNTER;
+	do {
+		sys_clock_tick_count = _sys_clock_tick_count;
+		elapsed_cycles = (rtc_now - (sys_clock_tick_count *
+					     RTC_TICKS_PER_SYS_TICK)) &
+				 RTC_MASK;
+		rtc_prev = rtc_now;
+		rtc_now = RTC_COUNTER;
+	} while (rtc_now != rtc_prev);
+
+	return (sys_clock_tick_count * sys_clock_hw_cycles_per_tick) +
 	       elapsed_cycles;
 }
 

include/arch/arm/cortex_m/error.h

@@ -35,6 +35,21 @@ extern void _SysFatalErrorHandler(unsigned int reason, const NANO_ESF *esf);
 #define _SVC_CALL_IRQ_OFFLOAD		1
 #define _SVC_CALL_RUNTIME_EXCEPT	2
 
+#if defined(CONFIG_ARMV6_M)
+/* ARMv6 will hard-fault if SVC is called with interrupts locked. Just
+ * force them unlocked, the thread is in an undefined state anyway
+ */
+#define _ARCH_EXCEPT(reason_p) do { \
+	__asm__ volatile ( \
+		"cpsie i\n\t" \
+		"mov r0, %[reason]\n\t" \
+		"svc %[id]\n\t" \
+		: \
+		: [reason] "i" (reason_p), [id] "i" (_SVC_CALL_RUNTIME_EXCEPT) \
+		: "memory"); \
+	CODE_UNREACHABLE; \
+} while (0)
+#elif defined(CONFIG_ARMV7_M)
 #define _ARCH_EXCEPT(reason_p) do { \
 	__asm__ volatile ( \
 		"mov r0, %[reason]\n\t" \
@@ -44,6 +59,9 @@ extern void _SysFatalErrorHandler(unsigned int reason, const NANO_ESF *esf);
 		: "memory"); \
 	CODE_UNREACHABLE; \
 } while (0)
+#else
+#error Unknown ARM architecture
+#endif /* CONFIG_ARMV6_M */
 
 #ifdef __cplusplus
 }