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Merge #321
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321: u8 as default SPI Word r=eldruin a=burrbull

Part of #320 

Co-authored-by: Andrey Zgarbul <[email protected]>
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bors[bot] and burrbull authored Nov 4, 2021
2 parents 11d541b + 4f5c8f6 commit ac66e33
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Showing 5 changed files with 13 additions and 9 deletions.
4 changes: 4 additions & 0 deletions CHANGELOG.md
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Expand Up @@ -7,6 +7,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).

## [Unreleased]

### Changed

- Use `u8` as default SPI as Serial Word type

### Added
- Added `Can` Controller Area Network traits.
- `Error` traits for SPI, I2C and Serial traits. The error types used in those must
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2 changes: 1 addition & 1 deletion src/serial/blocking.rs
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@@ -1,7 +1,7 @@
//! Blocking serial API
/// Write half of a serial interface (blocking variant)
pub trait Write<Word> {
pub trait Write<Word = u8> {
/// The type of error that can occur when writing
type Error: crate::serial::Error;

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4 changes: 2 additions & 2 deletions src/serial/nb.rs
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Expand Up @@ -4,7 +4,7 @@
///
/// Some serial interfaces support different data sizes (8 bits, 9 bits, etc.);
/// This can be encoded in this trait via the `Word` type parameter.
pub trait Read<Word> {
pub trait Read<Word = u8> {
/// Read error
type Error: crate::serial::Error;

Expand All @@ -21,7 +21,7 @@ impl<T: Read<Word>, Word> Read<Word> for &mut T {
}

/// Write half of a serial interface
pub trait Write<Word> {
pub trait Write<Word = u8> {
/// Write error
type Error: crate::serial::Error;

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10 changes: 5 additions & 5 deletions src/spi/blocking.rs
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@@ -1,7 +1,7 @@
//! Blocking SPI API
/// Blocking transfer
pub trait Transfer<W> {
pub trait Transfer<W = u8> {
/// Error type
type Error: crate::spi::Error;

Expand All @@ -20,7 +20,7 @@ impl<T: Transfer<W>, W> Transfer<W> for &mut T {
}

/// Blocking write
pub trait Write<W> {
pub trait Write<W = u8> {
/// Error type
type Error: crate::spi::Error;

Expand All @@ -37,7 +37,7 @@ impl<T: Write<W>, W> Write<W> for &mut T {
}

/// Blocking write (iterator version)
pub trait WriteIter<W> {
pub trait WriteIter<W = u8> {
/// Error type
type Error: crate::spi::Error;

Expand All @@ -62,7 +62,7 @@ impl<T: WriteIter<W>, W> WriteIter<W> for &mut T {
///
/// This allows composition of SPI operations into a single bus transaction
#[derive(Debug, PartialEq)]
pub enum Operation<'a, W: 'static> {
pub enum Operation<'a, W: 'static = u8> {
/// Write data from the provided buffer, discarding read data
Write(&'a [W]),
/// Write data out while reading data into the provided buffer
Expand All @@ -71,7 +71,7 @@ pub enum Operation<'a, W: 'static> {

/// Transactional trait allows multiple actions to be executed
/// as part of a single SPI transaction
pub trait Transactional<W: 'static> {
pub trait Transactional<W: 'static = u8> {
/// Associated error type
type Error: crate::spi::Error;

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2 changes: 1 addition & 1 deletion src/spi/nb.rs
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Expand Up @@ -16,7 +16,7 @@
///
/// - Some SPIs can work with 8-bit *and* 16-bit words. You can overload this trait with different
/// `Word` types to allow operation in both modes.
pub trait FullDuplex<Word> {
pub trait FullDuplex<Word = u8> {
/// An enumeration of SPI errors
type Error: crate::spi::Error;

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