Added armv8 support

[korken89]

Added flags for armv8m

[korken89]

This update is a little bit naive, but it will get this moving at least :)
Not 100% sure if the armv8-m mainline can support the pool, as I have note checked the core docs - but it seems good from the whitepaper which says:

ARMv8-M Mainline enhancements (relative to ARMv7-M) include:
• Load acquire, store release instructions (C11 atomic variable handling)

But we should test and read the docs for this.

[korken89]

I have been reading up on the armv8, and the mainline version is fully backwards compatible and hence this change should be valid.

[korken89]

@japaric Could you review this? :)

[japaric]

opt-level=z disassembly of:

#[exception]
fn SysTick() {
    core::mem::forget(A::alloc());
}

for thumbv7m-none-eabi

00000400 <SysTick>:
 400:   480a            ldr     r0, [pc, #40]   ; (42c <_stext+0x2c>)
 402:   e00c            b.n     41e <SysTick+0x1e>
 404:   680a            ldr     r2, [r1, #0]
 406:   e850 3f00       ldrex   r3, [r0]
 40a:   428b            cmp     r3, r1
 40c:   d105            bne.n   41a <SysTick+0x1a>
 40e:   f3bf 8f5f       dmb     sy
 412:   e840 2100       strex   r1, r2, [r0]
 416:   b911            cbnz    r1, 41e <SysTick+0x1e>
 418:   e006            b.n     428 <SysTick+0x28>
 41a:   f3bf 8f2f       clrex
 41e:   6801            ldr     r1, [r0, #0]
 420:   f3bf 8f5f       dmb     sy
 424:   2900            cmp     r1, #0
 426:   d1ed            bne.n   404 <SysTick+0x4>
 428:   4770            bx      lr
 42a:   bf00            nop
 42c:   20000000        .word   0x20000000

and for thumbv8m.main-none-eabi

00000400 <SysTick>:
 400:   4808            ldr     r0, [pc, #32]   ; (424 <_stext+0x24>)
 402:   e00a            b.n     41a <SysTick+0x1a>
 404:   680a            ldr     r2, [r1, #0]
 406:   e850 3f00       ldrex   r3, [r0]
 40a:   428b            cmp     r3, r1
 40c:   d103            bne.n   416 <SysTick+0x16>
 40e:   e8c0 2fe1       stlex   r1, r2, [r0]
 412:   b911            cbnz    r1, 41a <SysTick+0x1a>
 414:   e005            b.n     422 <SysTick+0x22>
 416:   f3bf 8f2f       clrex
 41a:   e8d0 1faf       lda     r1, [r0]
 41e:   2900            cmp     r1, #0
 420:   d1f0            bne.n   404 <SysTick+0x4>
 422:   4770            bx      lr
 424:   20000000        .word   0x20000000

These two disassemblies are equivalent because v8's lda is sugar for ldr + dmb and v8's stlex is sugar for dmb + ldrex. Furthermore the v8 reference manual states that "An exception return clears the local monitor" which matches the v7 behavior. Therefore v8.main is good to go.

v8.base looks a bit weird though; this is its disassembly:

00000400 <SysTick>:
 400:   4809            ldr     r0, [pc, #36]   ; (428 <_stext+0x28>)
 402:   e8d0 1faf       lda     r1, [r0]
 406:   b169            cbz     r1, 424 <SysTick+0x24>
 408:   680a            ldr     r2, [r1, #0]
 40a:   e850 3f00       ldrex   r3, [r0]
 40e:   428b            cmp     r3, r1
 410:   d102            bne.n   418 <SysTick+0x18>
 412:   e8c0 2fe1       stlex   r1, r2, [r0]
 416:   b119            cbz     r1, 420 <SysTick+0x20>
 418:   2100            movs    r1, #0
 41a:   2900            cmp     r1, #0
 41c:   d0f1            beq.n   402 <SysTick+0x2>
 41e:   e001            b.n     424 <SysTick+0x24>
 420:   2101            movs    r1, #1
 422:   e7fa            b.n     41a <SysTick+0x1a>
 424:   4770            bx      lr
 426:   46c0            nop                     ; (mov r8, r8)
 428:   20000000        .word   0x20000000

For starters it's missing the clrex instruction in the failure path (0x410 -> 0x418) which I think renders the whole thing implementation (vendor) defined. The failure path (0x418) also looks weird because it does unconditional branching in a roundabout way: r1 = 0; if r1 = 0 { continue }.

The CLREX instruction is part of the v8.baseline architecture AFAICT and LLVM is happy to emit the instruction if you write asm!("CLREX") so I find it weird that's missing in the above disassembly. This could be an LLVM bug so it's best to leave v8.baseline out for now.

@korken89 this looks good as it is.

bors r+

[bors]

Build succeeded

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