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Implemented rdrand and rdseed intrinsics #326

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Feb 27, 2018
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3 changes: 3 additions & 0 deletions coresimd/x86/i686/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,9 @@ pub use self::mmx::*;
mod pclmulqdq;
pub use self::pclmulqdq::*;

mod rdrand;
pub use self::rdrand::*;

mod sse;
pub use self::sse::*;

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80 changes: 80 additions & 0 deletions coresimd/x86/i686/rdrand.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,80 @@
//! RDRAND and RDSEED instructions for returning random numbers from an Intel
//! on-chip hardware random number generator which has been seeded by an on-chip
//! entropy source.
extern "platform-intrinsic" {
fn x86_rdrand16_step() -> (u16, i32);
fn x86_rdrand32_step() -> (u32, i32);
fn x86_rdrand64_step() -> (u64, i32);
fn x86_rdseed16_step() -> (u16, i32);
fn x86_rdseed32_step() -> (u32, i32);
fn x86_rdseed64_step() -> (u64, i32);
}
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We don't use platform-intrinsic in this crate. Can you link to the LLVM intrinsics directly?

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@newpavlov newpavlov Feb 21, 2018

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No, as was discussed in the issue LLVM type {I<width>, i32} can not be currently represented by Rust.

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I'm not sure that means we want to start using platform-intrinsics here.

We should probably wait for @alexcrichton to review this and help decide how to proceed.

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He suggested to use asm! block as a temporary solution, so I think platform-intrinsics will be an ok temporary solution as well.

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Ah yeah the platform intrinsic ABI here is the way to go for now. This may change in the future, but we can always just update the crate!

In any case this PR looks good to me, just waiting on the rust-lang/rust PR!


#[cfg(test)]
use stdsimd_test::assert_instr;

/// Read a hardware generated 16-bit random value and store the result in val.
/// Return 1 if a random value was generated, and 0 otherwise.
#[inline]
#[target_feature(enable = "rdrand")]
#[cfg_attr(test, assert_instr(rdrand))]
pub unsafe fn _rdrand16_step(val: &mut u16) -> i32 {
let (v, flag) = x86_rdrand16_step();
*val = v;
flag
}

/// Read a hardware generated 32-bit random value and store the result in val.
/// Return 1 if a random value was generated, and 0 otherwise.
#[inline]
#[target_feature(enable = "rdrand")]
#[cfg_attr(test, assert_instr(rdrand))]
pub unsafe fn _rdrand32_step(val: &mut u32) -> i32 {
let (v, flag) = x86_rdrand32_step();
*val = v;
flag
}

/// Read a hardware generated 64-bit random value and store the result in val.
/// Return 1 if a random value was generated, and 0 otherwise.
#[inline]
#[target_feature(enable = "rdrand")]
#[cfg_attr(test, assert_instr(rdrand))]
pub unsafe fn _rdrand64_step(val: &mut u64) -> i32 {
let (v, flag) = x86_rdrand64_step();
*val = v;
flag
}

/// Read a 16-bit NIST SP800-90B and SP800-90C compliant random value and store
/// in val. Return 1 if a random value was generated, and 0 otherwise.
#[inline]
#[target_feature(enable = "rdseed")]
#[cfg_attr(test, assert_instr(rdseed))]
pub unsafe fn _rdseed16_step(val: &mut u16) -> i32 {
let (v, flag) = x86_rdseed16_step();
*val = v;
flag
}

/// Read a 32-bit NIST SP800-90B and SP800-90C compliant random value and store
/// in val. Return 1 if a random value was generated, and 0 otherwise.
#[inline]
#[target_feature(enable = "rdseed")]
#[cfg_attr(test, assert_instr(rdseed))]
pub unsafe fn _rdseed32_step(val: &mut u32) -> i32 {
let (v, flag) = x86_rdseed32_step();
*val = v;
flag
}

/// Read a 64-bit NIST SP800-90B and SP800-90C compliant random value and store
/// in val. Return 1 if a random value was generated, and 0 otherwise.
#[inline]
#[target_feature(enable = "rdseed")]
#[cfg_attr(test, assert_instr(rdseed))]
pub unsafe fn _rdseed64_step(val: &mut u64) -> i32 {
let (v, flag) = x86_rdseed64_step();
*val = v;
flag
}
16 changes: 16 additions & 0 deletions stdsimd/arch/detect/x86.rs
Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,12 @@ macro_rules! is_target_feature_detected {
("pclmulqdq") => {
$crate::arch::detect::check_for(
$crate::arch::detect::Feature::pclmulqdq) };
("rdrand") => {
$crate::arch::detect::check_for(
$crate::arch::detect::Feature::rdrand) };
("rdseed") => {
$crate::arch::detect::check_for(
$crate::arch::detect::Feature::rdseed) };
("tsc") => {
$crate::arch::detect::check_for(
$crate::arch::detect::Feature::tsc) };
Expand Down Expand Up @@ -179,6 +185,10 @@ pub enum Feature {
aes,
/// CLMUL (Carry-less Multiplication)
pclmulqdq,
/// RDRAND
rdrand,
/// RDSEED
rdseed,
/// TSC (Time Stamp Counter)
tsc,
/// MMX
Expand Down Expand Up @@ -351,6 +361,8 @@ pub fn detect_features() -> cache::Initializer {
enable(proc_info_ecx, 23, Feature::popcnt);
enable(proc_info_ecx, 25, Feature::aes);
enable(proc_info_ecx, 1, Feature::pclmulqdq);
enable(proc_info_ecx, 30, Feature::rdrand);
enable(extended_features_ebx, 18, Feature::rdseed);
enable(proc_info_edx, 4, Feature::tsc);
enable(proc_info_edx, 23, Feature::mmx);
enable(proc_info_edx, 24, Feature::fxsr);
Expand Down Expand Up @@ -464,6 +476,8 @@ mod tests {
fn dump() {
println!("aes: {:?}", is_target_feature_detected!("aes"));
println!("pclmulqdq: {:?}", is_target_feature_detected!("pclmulqdq"));
println!("rdrand: {:?}", is_target_feature_detected!("rdrand"));
println!("rdseed: {:?}", is_target_feature_detected!("rdseed"));
println!("tsc: {:?}", is_target_feature_detected!("tsc"));
println!("sse: {:?}", is_target_feature_detected!("sse"));
println!("sse2: {:?}", is_target_feature_detected!("sse2"));
Expand Down Expand Up @@ -506,6 +520,8 @@ mod tests {
let information = cupid::master().unwrap();
assert_eq!(is_target_feature_detected!("aes"), information.aesni());
assert_eq!(is_target_feature_detected!("pclmulqdq"), information.pclmulqdq());
assert_eq!(is_target_feature_detected!("rdrand"), information.rdrand());
assert_eq!(is_target_feature_detected!("rdseed"), information.rdseed());
assert_eq!(is_target_feature_detected!("tsc"), information.tsc());
assert_eq!(is_target_feature_detected!("sse"), information.sse());
assert_eq!(is_target_feature_detected!("sse2"), information.sse2());
Expand Down