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Add support for RISC-V 64-bit (riscv64)
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The patch adds support for riscv64 architecture.

It was tested on Fedora/RISCV using 5.2-rc7 kernel.

Tested on top of libseccomp commit:
2b406e3

SECCOMP patch is included in Fedora/RISCV starting 20190703.n.0:
https://dl.fedoraproject.org/pub/alt/risc-v/disk-images/fedora/rawhide/20190703.n.0/Developer/

Kernel SECCOMP selftest is failing one test:

    [..]
    # [ RUN      ] global.user_notification_signal
    # [     FAIL ] global.user_notification_signal
    [..]
    # [==========] 73 / 74 tests passed.
    # [  FAILED  ]

libseccomp test results:

./regression -T live

    Regression Test Summary
     tests run: 9
     tests skipped: 0
     tests passed: 9
     tests failed: 0
     tests errored: 0

./regression

    Regression Test Summary
     tests run: 5200
     tests skipped: 142
     tests passed: 5200
     tests failed: 0
     tests errored: 0

Signed-off-by: David Abdurachmanov <[email protected]>
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David Abdurachmanov committed Aug 1, 2019
1 parent 2b406e3 commit 3358ea0
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Showing 34 changed files with 743 additions and 3 deletions.
23 changes: 23 additions & 0 deletions include/seccomp.h.in
Original file line number Diff line number Diff line change
Expand Up @@ -195,6 +195,19 @@ struct scmp_arg_cmp {
#define SCMP_ARCH_PARISC AUDIT_ARCH_PARISC
#define SCMP_ARCH_PARISC64 AUDIT_ARCH_PARISC64

/**
* The RISC-V architecture tokens
*/
#ifndef EM_RISCV
#define EM_RISCV 243
#endif /* EM_RISCV */

#ifndef AUDIT_ARCH_RISCV64
#define AUDIT_ARCH_RISCV64 (EM_RISCV|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
#endif /* AUDIT_ARCH_RISCV64 */

#define SCMP_ARCH_RISCV64 AUDIT_ARCH_RISCV64

/**
* Convert a syscall name into the associated syscall number
* @param x the syscall name
Expand Down Expand Up @@ -1861,6 +1874,16 @@ int seccomp_export_bpf(const scmp_filter_ctx ctx, int fd);
#define __NR_rseq __PNR_rseq
#endif /* __NR_rseq */

#define __PNR_riscv_flush_icache -10211
#ifndef __NR_riscv_flush_icache
#define __NR_riscv_flush_icache __PNR_riscv_flush_icache
#endif /* __NR_riscv_flush_icache */

#define __PNR_renameat -10212
#ifndef __NR_renameat
#define __NR_renameat __PNR_renameat
#endif /* __NR_renameat */

#ifdef __cplusplus
}
#endif
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1 change: 1 addition & 0 deletions src/Makefile.am
Original file line number Diff line number Diff line change
Expand Up @@ -42,6 +42,7 @@ SOURCES_ALL = \
arch-parisc.h arch-parisc.c arch-parisc64.c arch-parisc-syscalls.c \
arch-ppc.h arch-ppc.c arch-ppc-syscalls.c \
arch-ppc64.h arch-ppc64.c arch-ppc64-syscalls.c \
arch-riscv64.h arch-riscv64.c arch-riscv64-syscalls.c \
arch-s390.h arch-s390.c arch-s390-syscalls.c \
arch-s390x.h arch-s390x.c arch-s390x-syscalls.c

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1 change: 1 addition & 0 deletions src/arch-aarch64-syscalls.c
Original file line number Diff line number Diff line change
Expand Up @@ -299,6 +299,7 @@ const struct arch_syscall_def aarch64_syscall_table[] = { \
{ "renameat2", 276 },
{ "request_key", 218 },
{ "restart_syscall", 128 },
{ "riscv_flush_icache", __PNR_riscv_flush_icache },
{ "rmdir", __PNR_rmdir },
{ "rseq", 293 },
{ "rt_sigaction", 134 },
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1 change: 1 addition & 0 deletions src/arch-arm-syscalls.c
Original file line number Diff line number Diff line change
Expand Up @@ -311,6 +311,7 @@ const struct arch_syscall_def arm_syscall_table[] = { \
{ "renameat2", (__SCMP_NR_BASE + 382) },
{ "request_key", (__SCMP_NR_BASE + 310) },
{ "restart_syscall", (__SCMP_NR_BASE + 0) },
{ "riscv_flush_icache", __PNR_riscv_flush_icache },
{ "rmdir", (__SCMP_NR_BASE + 40) },
{ "rseq", (__SCMP_NR_BASE + 398) },
{ "rt_sigaction", (__SCMP_NR_BASE + 174) },
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1 change: 1 addition & 0 deletions src/arch-mips-syscalls.c
Original file line number Diff line number Diff line change
Expand Up @@ -303,6 +303,7 @@ const struct arch_syscall_def mips_syscall_table[] = { \
{ "renameat2", (__SCMP_NR_BASE + 351) },
{ "request_key", (__SCMP_NR_BASE + 281) },
{ "restart_syscall", (__SCMP_NR_BASE + 253) },
{ "riscv_flush_icache", __PNR_riscv_flush_icache },
{ "rmdir", (__SCMP_NR_BASE + 40) },
{ "rseq", (__SCMP_NR_BASE + 367) },
{ "rt_sigaction", (__SCMP_NR_BASE + 194) },
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1 change: 1 addition & 0 deletions src/arch-mips64-syscalls.c
Original file line number Diff line number Diff line change
Expand Up @@ -303,6 +303,7 @@ const struct arch_syscall_def mips64_syscall_table[] = { \
{ "renameat2", (__SCMP_NR_BASE + 311) },
{ "request_key", (__SCMP_NR_BASE + 240) },
{ "restart_syscall", (__SCMP_NR_BASE + 213) },
{ "riscv_flush_icache", __PNR_riscv_flush_icache },
{ "rmdir", (__SCMP_NR_BASE + 82) },
{ "rseq", (__SCMP_NR_BASE + 327) },
{ "rt_sigaction", (__SCMP_NR_BASE + 13) },
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1 change: 1 addition & 0 deletions src/arch-mips64n32-syscalls.c
Original file line number Diff line number Diff line change
Expand Up @@ -303,6 +303,7 @@ const struct arch_syscall_def mips64n32_syscall_table[] = { \
{ "renameat2", (__SCMP_NR_BASE + 315) },
{ "request_key", (__SCMP_NR_BASE + 244) },
{ "restart_syscall", (__SCMP_NR_BASE + 214) },
{ "riscv_flush_icache", __PNR_riscv_flush_icache },
{ "rmdir", (__SCMP_NR_BASE + 82) },
{ "rseq", (__SCMP_NR_BASE + 331) },
{ "rt_sigaction", (__SCMP_NR_BASE + 13) },
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1 change: 1 addition & 0 deletions src/arch-parisc-syscalls.c
Original file line number Diff line number Diff line change
Expand Up @@ -283,6 +283,7 @@ const struct arch_syscall_def parisc_syscall_table[] = { \
{ "renameat2", 337 },
{ "request_key", 265 },
{ "restart_syscall", 0 },
{ "riscv_flush_icache", __PNR_riscv_flush_icache },
{ "rmdir", 40 },
{ "rseq", __PNR_rseq },
{ "rt_sigaction", 174 },
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1 change: 1 addition & 0 deletions src/arch-ppc-syscalls.c
Original file line number Diff line number Diff line change
Expand Up @@ -300,6 +300,7 @@ const struct arch_syscall_def ppc_syscall_table[] = { \
{ "renameat2", 357 },
{ "request_key", 270 },
{ "restart_syscall", 0 },
{ "riscv_flush_icache", __PNR_riscv_flush_icache },
{ "rmdir", 40 },
{ "rseq", 387 },
{ "rt_sigaction", 173 },
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1 change: 1 addition & 0 deletions src/arch-ppc64-syscalls.c
Original file line number Diff line number Diff line change
Expand Up @@ -300,6 +300,7 @@ const struct arch_syscall_def ppc64_syscall_table[] = { \
{ "renameat2", 357 },
{ "request_key", 270 },
{ "restart_syscall", 0 },
{ "riscv_flush_icache", __PNR_riscv_flush_icache },
{ "rmdir", 40 },
{ "rseq", 387 },
{ "rt_sigaction", 173 },
Expand Down
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