Merge pull request #2436 from plavin/ariel_latency_stats

Add latency tracking to Ariel
sstsimulator · Jan 15, 2025 · 9456acb · 9456acb
2 parents a52be96 + c99c6bf
commit 9456acb
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Showing 4 changed files with 32 additions and 10 deletions.
diff --git a/src/sst/elements/ariel/arielcore.cc b/src/sst/elements/ariel/arielcore.cc
@@ -37,13 +37,15 @@ ArielCore::ArielCore(ComponentId_t id, ArielTunnel *tunnel,
             uint32_t thisCoreID, uint32_t maxPendTrans,
             Output* out, uint32_t maxIssuePerCyc,
             uint32_t maxQLen, uint64_t cacheLineSz,
-            ArielMemoryManager* memMgr, const uint32_t perform_address_checks, Params& params) :
+            ArielMemoryManager* memMgr, const uint32_t perform_address_checks, Params& params,
+            TimeConverter *timeconverter) :
             ComponentExtension(id), output(out), tunnel(tunnel),
 #ifdef HAVE_CUDA
             tunnelR(tunnelR), tunnelD(tunnelD),
 #endif
             perform_checks(perform_address_checks),
-            verbosity(static_cast<uint32_t>(out->getVerboseLevel())) {
+            verbosity(static_cast<uint32_t>(out->getVerboseLevel())),
+            timeconverter(timeconverter) {
 
     // set both counters for flushes to 0
     output->verbose(CALL_INFO, 2, 0, "Creating core with ID %" PRIu32 ", maximum queue length=%" PRIu32 ", max issue is: %" PRIu32 "\n", thisCoreID, maxQLen, maxIssuePerCyc);
@@ -60,7 +62,7 @@ ArielCore::ArielCore(ComponentId_t id, ArielTunnel *tunnel,
 
     writePayloads = params.find<int>("writepayloadtrace") == 0 ? false : true;
     coreQ = new std::queue<ArielEvent*>();
-    pendingTransactions = new std::unordered_map<StandardMem::Request::id_t, StandardMem::Request*>();
+    pendingTransactions = new std::unordered_map<StandardMem::Request::id_t, RequestInfo>();
     pending_transaction_count = 0;
 
 #ifdef HAVE_CUDA
@@ -81,10 +83,13 @@ ArielCore::ArielCore(ComponentId_t id, ArielTunnel *tunnel,
 
     statReadRequests  = registerStatistic<uint64_t>( "read_requests", subID );
     statWriteRequests = registerStatistic<uint64_t>( "write_requests", subID );
+    statReadLatency  = registerStatistic<uint64_t>( "read_latency", subID);
+    statWriteLatency = registerStatistic<uint64_t>( "write_latency", subID);
     statReadRequestSizes = registerStatistic<uint64_t>( "read_request_sizes", subID );
     statWriteRequestSizes = registerStatistic<uint64_t>( "write_request_sizes", subID );
     statSplitReadRequests = registerStatistic<uint64_t>( "split_read_requests", subID );
     statSplitWriteRequests = registerStatistic<uint64_t>( "split_write_requests", subID );
+
     statFlushRequests = registerStatistic<uint64_t>( "flush_requests", subID);
     statFenceRequests = registerStatistic<uint64_t>( "fence_requests", subID);
     statNoopCount     = registerStatistic<uint64_t>( "no_ops", subID );
@@ -104,6 +109,7 @@ ArielCore::ArielCore(ComponentId_t id, ArielTunnel *tunnel,
     statFPSPOps = registerStatistic<uint64_t>("fp_sp_ops", subID);
     statFPDPOps = registerStatistic<uint64_t>("fp_dp_ops", subID);
 
+
     free(subID);
 
     memmgr->registerInterruptHandler(coreID, new ArielMemoryManager::InterruptHandler<ArielCore>(this, &ArielCore::handleInterrupt));
@@ -179,7 +185,7 @@ void ArielCore::commitReadEvent(const uint64_t address,
         }else {
 #endif
             pending_transaction_count++;
-            pendingTransactions->insert( std::pair<StandardMem::Request::id_t, StandardMem::Request*>(req->getID(), req) );
+            pendingTransactions->insert( std::pair<StandardMem::Request::id_t, RequestInfo>(req->getID(), {req, getCurrentSimTime(timeconverter)}) );
 #ifdef HAVE_CUDA
         }
 #endif
@@ -227,7 +233,7 @@ void ArielCore::commitWriteEvent(const uint64_t address,
         } else{
 #endif
             pending_transaction_count++;
-            pendingTransactions->insert( std::pair<StandardMem::Request::id_t, StandardMem::Request*>(req->getID(), req) );
+            pendingTransactions->insert( std::pair<StandardMem::Request::id_t, RequestInfo>(req->getID(), {req, getCurrentSimTime(timeconverter)}) );
 #ifdef HAVE_CUDA
         }
 #endif
@@ -251,7 +257,7 @@ void ArielCore::commitFlushEvent(const uint64_t address,
         /*  Todo: should the request specify the physical address, or the virtual address? */
         StandardMem::Request *req = new StandardMem::FlushAddr( address, length, true, std::numeric_limits<uint32_t>::max());
         pending_transaction_count++;
-        pendingTransactions->insert( std::pair<StandardMem::Request::id_t, StandardMem::Request*>(req->getID(), req) );
+        pendingTransactions->insert( std::pair<StandardMem::Request::id_t, RequestInfo>(req->getID(), {req, getCurrentSimTime(timeconverter)}) );
 
         cacheLink->send(req);
         statFlushRequests->addData(1);
@@ -480,6 +486,11 @@ void ArielCore::handleEvent(StandardMem::Request* event) {
 #else
     if(find_entry != pendingTransactions->end()) {
 #endif
+        if (dynamic_cast<StandardMem::ReadResp*>(event)) {
+            statReadLatency->addData(getCurrentSimTime(timeconverter) - find_entry->second.start);
+        } else if (dynamic_cast<StandardMem::WriteResp*>(event)) {
+            statWriteLatency->addData(getCurrentSimTime(timeconverter) - find_entry->second.start);
+        }
         ARIEL_CORE_VERBOSE(4, output->verbose(CALL_INFO, 4, 0, "Correctly identified event in pending transactions, removing from list, before there are: %" PRIu32 " transactions pending.\n",
                             (uint32_t) pendingTransactions->size()));
 

diff --git a/src/sst/elements/ariel/arielcore.h b/src/sst/elements/ariel/arielcore.h
@@ -60,6 +60,11 @@ using namespace SST;
 using namespace SST::Interfaces;
 using namespace SST::ArielComponent;
 
+struct RequestInfo {
+        StandardMem::Request *req;
+        uint64_t start;
+};
+
 namespace SST {
 namespace ArielComponent {
 
@@ -73,7 +78,8 @@ class ArielCore : public ComponentExtension {
 #endif
             uint32_t thisCoreID, uint32_t maxPendTans, Output* out,
             uint32_t maxIssuePerCyc, uint32_t maxQLen, uint64_t cacheLineSz,
-            ArielMemoryManager* memMgr, const uint32_t perform_address_checks, Params& params);
+            ArielMemoryManager* memMgr, const uint32_t perform_address_checks, Params& params,
+            TimeConverter *timeconverter);
         ~ArielCore();
 
         bool isCoreHalted() const;
@@ -226,6 +232,7 @@ class ArielCore : public ComponentExtension {
         ArielTunnel *tunnel;
         StdMemHandler* stdMemHandlers;
         Link* RtlLink;
+        TimeConverter *timeconverter; // TimeConverter for the associated ArielCPU
 
 #ifdef HAVE_CUDA
         Link* GpuLink;
@@ -234,7 +241,7 @@ class ArielCore : public ComponentExtension {
         std::unordered_map<StandardMem::Request::id_t, StandardMem::Request*>* pendingGpuTransactions;
 #endif
 
-        std::unordered_map<StandardMem::Request::id_t, StandardMem::Request*>* pendingTransactions;
+        std::unordered_map<StandardMem::Request::id_t, RequestInfo>* pendingTransactions;
         uint32_t maxIssuePerCycle;
         uint32_t maxQLength;
         uint64_t cacheLineSize;
@@ -257,6 +264,8 @@ class ArielCore : public ComponentExtension {
 
         Statistic<uint64_t>* statReadRequests;
         Statistic<uint64_t>* statWriteRequests;
+        Statistic<uint64_t>* statReadLatency;
+        Statistic<uint64_t>* statWriteLatency;
         Statistic<uint64_t>* statFlushRequests;
         Statistic<uint64_t>* statFenceRequests;
         Statistic<uint64_t>* statReadRequestSizes;

diff --git a/src/sst/elements/ariel/arielcpu.cc b/src/sst/elements/ariel/arielcpu.cc
@@ -184,7 +184,7 @@ ArielCPU::ArielCPU(ComponentId_t id, Params& params) :
                  tunnelR, tunnelD,
 #endif
                  i, maxPendingTransCore, output, maxIssuesPerCycle, maxCoreQueueLen,
-                 cacheLineSize, memmgr, perform_checks, params));
+                 cacheLineSize, memmgr, perform_checks, params, timeconverter));
 
         // Set max number of instructions
         cpu_cores[i]->setMaxInsts(max_insts);

diff --git a/src/sst/elements/ariel/arielcpu.h b/src/sst/elements/ariel/arielcpu.h
@@ -92,7 +92,9 @@ class ArielCPU : public SST::Component {
     SST_ELI_DOCUMENT_STATISTICS(
         { "read_requests",        "Statistic counts number of read requests", "requests", 1},   // Name, Desc, Enable Level
         { "write_requests",       "Statistic counts number of write requests", "requests", 1},
-        { "read_request_sizes",   "Statistic for size of read requests", "bytes", 1},   // Name, Desc, Enable Level
+        { "read_latency",         "Statistic for latency of read requests", "cycles", 1},
+        { "write_latency",        "Statistic for latency of write requests", "cycles", 1},
+        { "read_request_sizes",   "Statistic for size of read requests", "bytes", 1},
         { "write_request_sizes",  "Statistic for size of write requests", "bytes", 1},
         { "split_read_requests",  "Statistic counts number of split read requests (requests which come from multiple lines)", "requests", 1},
         { "split_write_requests", "Statistic counts number of split write requests (requests which are split over multiple lines)", "requests", 1},