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[AArch64][CodeGen] Fix wrong operand order when creating vcmla intrin… #9012

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[AArch64][CodeGen] Fix wrong operand order when creating vcmla intrin… #9012

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2 changes: 1 addition & 1 deletion llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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Expand Up @@ -26309,7 +26309,7 @@ Value *AArch64TargetLowering::createComplexDeinterleavingIR(


return B.CreateIntrinsic(IdMap[(int)Rotation], Ty,
{Accumulator, InputB, InputA});
{Accumulator, InputA, InputB});
}

if (OperationType == ComplexDeinterleavingOperation::CAdd) {
Expand Down
48 changes: 24 additions & 24 deletions llvm/test/CodeGen/AArch64/complex-deinterleaving-add-mull-fixed-contract.ll
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Expand Up @@ -48,14 +48,14 @@ define <4 x double> @mul_add_mull(<4 x double> %a, <4 x double> %b, <4 x double>
; CHECK-NEXT: movi v17.2d, #0000000000000000
; CHECK-NEXT: movi v18.2d, #0000000000000000
; CHECK-NEXT: movi v19.2d, #0000000000000000
; CHECK-NEXT: fcmla v16.2d, v0.2d, v2.2d, #0
; CHECK-NEXT: fcmla v17.2d, v1.2d, v3.2d, #0
; CHECK-NEXT: fcmla v18.2d, v4.2d, v6.2d, #0
; CHECK-NEXT: fcmla v19.2d, v5.2d, v7.2d, #0
; CHECK-NEXT: fcmla v16.2d, v0.2d, v2.2d, #90
; CHECK-NEXT: fcmla v17.2d, v1.2d, v3.2d, #90
; CHECK-NEXT: fcmla v18.2d, v4.2d, v6.2d, #90
; CHECK-NEXT: fcmla v19.2d, v5.2d, v7.2d, #90
; CHECK-NEXT: fcmla v16.2d, v2.2d, v0.2d, #0
; CHECK-NEXT: fcmla v17.2d, v3.2d, v1.2d, #0
; CHECK-NEXT: fcmla v18.2d, v6.2d, v4.2d, #0
; CHECK-NEXT: fcmla v19.2d, v7.2d, v5.2d, #0
; CHECK-NEXT: fcmla v16.2d, v2.2d, v0.2d, #90
; CHECK-NEXT: fcmla v17.2d, v3.2d, v1.2d, #90
; CHECK-NEXT: fcmla v18.2d, v6.2d, v4.2d, #90
; CHECK-NEXT: fcmla v19.2d, v7.2d, v5.2d, #90
; CHECK-NEXT: fadd v0.2d, v16.2d, v18.2d
; CHECK-NEXT: fadd v1.2d, v17.2d, v19.2d
; CHECK-NEXT: ret
Expand Down Expand Up @@ -94,14 +94,14 @@ define <4 x double> @mul_sub_mull(<4 x double> %a, <4 x double> %b, <4 x double>
; CHECK-NEXT: movi v17.2d, #0000000000000000
; CHECK-NEXT: movi v18.2d, #0000000000000000
; CHECK-NEXT: movi v19.2d, #0000000000000000
; CHECK-NEXT: fcmla v16.2d, v0.2d, v2.2d, #0
; CHECK-NEXT: fcmla v17.2d, v1.2d, v3.2d, #0
; CHECK-NEXT: fcmla v18.2d, v4.2d, v6.2d, #0
; CHECK-NEXT: fcmla v19.2d, v5.2d, v7.2d, #0
; CHECK-NEXT: fcmla v16.2d, v0.2d, v2.2d, #90
; CHECK-NEXT: fcmla v17.2d, v1.2d, v3.2d, #90
; CHECK-NEXT: fcmla v18.2d, v4.2d, v6.2d, #90
; CHECK-NEXT: fcmla v19.2d, v5.2d, v7.2d, #90
; CHECK-NEXT: fcmla v16.2d, v2.2d, v0.2d, #0
; CHECK-NEXT: fcmla v17.2d, v3.2d, v1.2d, #0
; CHECK-NEXT: fcmla v18.2d, v6.2d, v4.2d, #0
; CHECK-NEXT: fcmla v19.2d, v7.2d, v5.2d, #0
; CHECK-NEXT: fcmla v16.2d, v2.2d, v0.2d, #90
; CHECK-NEXT: fcmla v17.2d, v3.2d, v1.2d, #90
; CHECK-NEXT: fcmla v18.2d, v6.2d, v4.2d, #90
; CHECK-NEXT: fcmla v19.2d, v7.2d, v5.2d, #90
; CHECK-NEXT: fsub v0.2d, v16.2d, v18.2d
; CHECK-NEXT: fsub v1.2d, v17.2d, v19.2d
; CHECK-NEXT: ret
Expand Down Expand Up @@ -140,14 +140,14 @@ define <4 x double> @mul_conj_mull(<4 x double> %a, <4 x double> %b, <4 x double
; CHECK-NEXT: movi v17.2d, #0000000000000000
; CHECK-NEXT: movi v18.2d, #0000000000000000
; CHECK-NEXT: movi v19.2d, #0000000000000000
; CHECK-NEXT: fcmla v16.2d, v0.2d, v2.2d, #0
; CHECK-NEXT: fcmla v17.2d, v1.2d, v3.2d, #0
; CHECK-NEXT: fcmla v18.2d, v6.2d, v4.2d, #0
; CHECK-NEXT: fcmla v19.2d, v7.2d, v5.2d, #0
; CHECK-NEXT: fcmla v16.2d, v0.2d, v2.2d, #90
; CHECK-NEXT: fcmla v17.2d, v1.2d, v3.2d, #90
; CHECK-NEXT: fcmla v18.2d, v6.2d, v4.2d, #270
; CHECK-NEXT: fcmla v19.2d, v7.2d, v5.2d, #270
; CHECK-NEXT: fcmla v16.2d, v2.2d, v0.2d, #0
; CHECK-NEXT: fcmla v17.2d, v3.2d, v1.2d, #0
; CHECK-NEXT: fcmla v18.2d, v4.2d, v6.2d, #0
; CHECK-NEXT: fcmla v19.2d, v5.2d, v7.2d, #0
; CHECK-NEXT: fcmla v16.2d, v2.2d, v0.2d, #90
; CHECK-NEXT: fcmla v17.2d, v3.2d, v1.2d, #90
; CHECK-NEXT: fcmla v18.2d, v4.2d, v6.2d, #270
; CHECK-NEXT: fcmla v19.2d, v5.2d, v7.2d, #270
; CHECK-NEXT: fadd v0.2d, v16.2d, v18.2d
; CHECK-NEXT: fadd v1.2d, v17.2d, v19.2d
; CHECK-NEXT: ret
Expand Down
56 changes: 28 additions & 28 deletions llvm/test/CodeGen/AArch64/complex-deinterleaving-add-mull-fixed-fast.ll
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Expand Up @@ -7,10 +7,10 @@ target triple = "aarch64"
define <4 x double> @mull_add(<4 x double> %a, <4 x double> %b, <4 x double> %c) {
; CHECK-LABEL: mull_add:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: fcmla v4.2d, v2.2d, v0.2d, #0
; CHECK-NEXT: fcmla v5.2d, v3.2d, v1.2d, #0
; CHECK-NEXT: fcmla v4.2d, v2.2d, v0.2d, #90
; CHECK-NEXT: fcmla v5.2d, v3.2d, v1.2d, #90
; CHECK-NEXT: fcmla v4.2d, v0.2d, v2.2d, #0
; CHECK-NEXT: fcmla v5.2d, v1.2d, v3.2d, #0
; CHECK-NEXT: fcmla v4.2d, v0.2d, v2.2d, #90
; CHECK-NEXT: fcmla v5.2d, v1.2d, v3.2d, #90
; CHECK-NEXT: mov v0.16b, v4.16b
; CHECK-NEXT: mov v1.16b, v5.16b
; CHECK-NEXT: ret
Expand Down Expand Up @@ -39,14 +39,14 @@ define <4 x double> @mul_add_mull(<4 x double> %a, <4 x double> %b, <4 x double>
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: movi v16.2d, #0000000000000000
; CHECK-NEXT: movi v17.2d, #0000000000000000
; CHECK-NEXT: fcmla v16.2d, v4.2d, v6.2d, #0
; CHECK-NEXT: fcmla v17.2d, v5.2d, v7.2d, #0
; CHECK-NEXT: fcmla v16.2d, v2.2d, v0.2d, #0
; CHECK-NEXT: fcmla v17.2d, v3.2d, v1.2d, #0
; CHECK-NEXT: fcmla v16.2d, v4.2d, v6.2d, #90
; CHECK-NEXT: fcmla v17.2d, v5.2d, v7.2d, #90
; CHECK-NEXT: fcmla v16.2d, v2.2d, v0.2d, #90
; CHECK-NEXT: fcmla v17.2d, v3.2d, v1.2d, #90
; CHECK-NEXT: fcmla v16.2d, v6.2d, v4.2d, #0
; CHECK-NEXT: fcmla v17.2d, v7.2d, v5.2d, #0
; CHECK-NEXT: fcmla v16.2d, v0.2d, v2.2d, #0
; CHECK-NEXT: fcmla v17.2d, v1.2d, v3.2d, #0
; CHECK-NEXT: fcmla v16.2d, v6.2d, v4.2d, #90
; CHECK-NEXT: fcmla v17.2d, v7.2d, v5.2d, #90
; CHECK-NEXT: fcmla v16.2d, v0.2d, v2.2d, #90
; CHECK-NEXT: fcmla v17.2d, v1.2d, v3.2d, #90
; CHECK-NEXT: mov v0.16b, v16.16b
; CHECK-NEXT: mov v1.16b, v17.16b
; CHECK-NEXT: ret
Expand Down Expand Up @@ -83,14 +83,14 @@ define <4 x double> @mul_sub_mull(<4 x double> %a, <4 x double> %b, <4 x double>
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: movi v16.2d, #0000000000000000
; CHECK-NEXT: movi v17.2d, #0000000000000000
; CHECK-NEXT: fcmla v16.2d, v4.2d, v6.2d, #270
; CHECK-NEXT: fcmla v17.2d, v5.2d, v7.2d, #270
; CHECK-NEXT: fcmla v16.2d, v2.2d, v0.2d, #0
; CHECK-NEXT: fcmla v17.2d, v3.2d, v1.2d, #0
; CHECK-NEXT: fcmla v16.2d, v4.2d, v6.2d, #180
; CHECK-NEXT: fcmla v17.2d, v5.2d, v7.2d, #180
; CHECK-NEXT: fcmla v16.2d, v2.2d, v0.2d, #90
; CHECK-NEXT: fcmla v17.2d, v3.2d, v1.2d, #90
; CHECK-NEXT: fcmla v16.2d, v6.2d, v4.2d, #270
; CHECK-NEXT: fcmla v17.2d, v7.2d, v5.2d, #270
; CHECK-NEXT: fcmla v16.2d, v0.2d, v2.2d, #0
; CHECK-NEXT: fcmla v17.2d, v1.2d, v3.2d, #0
; CHECK-NEXT: fcmla v16.2d, v6.2d, v4.2d, #180
; CHECK-NEXT: fcmla v17.2d, v7.2d, v5.2d, #180
; CHECK-NEXT: fcmla v16.2d, v0.2d, v2.2d, #90
; CHECK-NEXT: fcmla v17.2d, v1.2d, v3.2d, #90
; CHECK-NEXT: mov v0.16b, v16.16b
; CHECK-NEXT: mov v1.16b, v17.16b
; CHECK-NEXT: ret
Expand Down Expand Up @@ -127,14 +127,14 @@ define <4 x double> @mul_conj_mull(<4 x double> %a, <4 x double> %b, <4 x double
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: movi v16.2d, #0000000000000000
; CHECK-NEXT: movi v17.2d, #0000000000000000
; CHECK-NEXT: fcmla v16.2d, v2.2d, v0.2d, #0
; CHECK-NEXT: fcmla v17.2d, v3.2d, v1.2d, #0
; CHECK-NEXT: fcmla v16.2d, v2.2d, v0.2d, #90
; CHECK-NEXT: fcmla v17.2d, v3.2d, v1.2d, #90
; CHECK-NEXT: fcmla v16.2d, v6.2d, v4.2d, #0
; CHECK-NEXT: fcmla v17.2d, v7.2d, v5.2d, #0
; CHECK-NEXT: fcmla v16.2d, v6.2d, v4.2d, #270
; CHECK-NEXT: fcmla v17.2d, v7.2d, v5.2d, #270
; CHECK-NEXT: fcmla v16.2d, v0.2d, v2.2d, #0
; CHECK-NEXT: fcmla v17.2d, v1.2d, v3.2d, #0
; CHECK-NEXT: fcmla v16.2d, v0.2d, v2.2d, #90
; CHECK-NEXT: fcmla v17.2d, v1.2d, v3.2d, #90
; CHECK-NEXT: fcmla v16.2d, v4.2d, v6.2d, #0
; CHECK-NEXT: fcmla v17.2d, v5.2d, v7.2d, #0
; CHECK-NEXT: fcmla v16.2d, v4.2d, v6.2d, #270
; CHECK-NEXT: fcmla v17.2d, v5.2d, v7.2d, #270
; CHECK-NEXT: mov v0.16b, v16.16b
; CHECK-NEXT: mov v1.16b, v17.16b
; CHECK-NEXT: ret
Expand Down
32 changes: 16 additions & 16 deletions llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-mul.ll
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Expand Up @@ -38,8 +38,8 @@ define <4 x half> @complex_mul_v4f16(<4 x half> %a, <4 x half> %b) {
; CHECK-LABEL: complex_mul_v4f16:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: movi d2, #0000000000000000
; CHECK-NEXT: fcmla v2.4h, v0.4h, v1.4h, #0
; CHECK-NEXT: fcmla v2.4h, v0.4h, v1.4h, #90
; CHECK-NEXT: fcmla v2.4h, v1.4h, v0.4h, #0
; CHECK-NEXT: fcmla v2.4h, v1.4h, v0.4h, #90
; CHECK-NEXT: fmov d0, d2
; CHECK-NEXT: ret
entry:
Expand All @@ -62,8 +62,8 @@ define <8 x half> @complex_mul_v8f16(<8 x half> %a, <8 x half> %b) {
; CHECK-LABEL: complex_mul_v8f16:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: movi v2.2d, #0000000000000000
; CHECK-NEXT: fcmla v2.8h, v0.8h, v1.8h, #0
; CHECK-NEXT: fcmla v2.8h, v0.8h, v1.8h, #90
; CHECK-NEXT: fcmla v2.8h, v1.8h, v0.8h, #0
; CHECK-NEXT: fcmla v2.8h, v1.8h, v0.8h, #90
; CHECK-NEXT: mov v0.16b, v2.16b
; CHECK-NEXT: ret
entry:
Expand All @@ -87,10 +87,10 @@ define <16 x half> @complex_mul_v16f16(<16 x half> %a, <16 x half> %b) {
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: movi v4.2d, #0000000000000000
; CHECK-NEXT: movi v5.2d, #0000000000000000
; CHECK-NEXT: fcmla v4.8h, v0.8h, v2.8h, #0
; CHECK-NEXT: fcmla v5.8h, v1.8h, v3.8h, #0
; CHECK-NEXT: fcmla v4.8h, v0.8h, v2.8h, #90
; CHECK-NEXT: fcmla v5.8h, v1.8h, v3.8h, #90
; CHECK-NEXT: fcmla v4.8h, v2.8h, v0.8h, #0
; CHECK-NEXT: fcmla v5.8h, v3.8h, v1.8h, #0
; CHECK-NEXT: fcmla v4.8h, v2.8h, v0.8h, #90
; CHECK-NEXT: fcmla v5.8h, v3.8h, v1.8h, #90
; CHECK-NEXT: mov v0.16b, v4.16b
; CHECK-NEXT: mov v1.16b, v5.16b
; CHECK-NEXT: ret
Expand All @@ -117,14 +117,14 @@ define <32 x half> @complex_mul_v32f16(<32 x half> %a, <32 x half> %b) {
; CHECK-NEXT: movi v17.2d, #0000000000000000
; CHECK-NEXT: movi v18.2d, #0000000000000000
; CHECK-NEXT: movi v19.2d, #0000000000000000
; CHECK-NEXT: fcmla v16.8h, v0.8h, v4.8h, #0
; CHECK-NEXT: fcmla v17.8h, v1.8h, v5.8h, #0
; CHECK-NEXT: fcmla v18.8h, v2.8h, v6.8h, #0
; CHECK-NEXT: fcmla v19.8h, v3.8h, v7.8h, #0
; CHECK-NEXT: fcmla v16.8h, v0.8h, v4.8h, #90
; CHECK-NEXT: fcmla v17.8h, v1.8h, v5.8h, #90
; CHECK-NEXT: fcmla v18.8h, v2.8h, v6.8h, #90
; CHECK-NEXT: fcmla v19.8h, v3.8h, v7.8h, #90
; CHECK-NEXT: fcmla v16.8h, v4.8h, v0.8h, #0
; CHECK-NEXT: fcmla v17.8h, v5.8h, v1.8h, #0
; CHECK-NEXT: fcmla v18.8h, v6.8h, v2.8h, #0
; CHECK-NEXT: fcmla v19.8h, v7.8h, v3.8h, #0
; CHECK-NEXT: fcmla v16.8h, v4.8h, v0.8h, #90
; CHECK-NEXT: fcmla v17.8h, v5.8h, v1.8h, #90
; CHECK-NEXT: fcmla v18.8h, v6.8h, v2.8h, #90
; CHECK-NEXT: fcmla v19.8h, v7.8h, v3.8h, #90
; CHECK-NEXT: mov v0.16b, v16.16b
; CHECK-NEXT: mov v1.16b, v17.16b
; CHECK-NEXT: mov v2.16b, v18.16b
Expand Down
32 changes: 16 additions & 16 deletions llvm/test/CodeGen/AArch64/complex-deinterleaving-f32-mul.ll
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Expand Up @@ -8,8 +8,8 @@ define <2 x float> @complex_mul_v2f32(<2 x float> %a, <2 x float> %b) {
; CHECK-LABEL: complex_mul_v2f32:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: movi d2, #0000000000000000
; CHECK-NEXT: fcmla v2.2s, v0.2s, v1.2s, #0
; CHECK-NEXT: fcmla v2.2s, v0.2s, v1.2s, #90
; CHECK-NEXT: fcmla v2.2s, v1.2s, v0.2s, #0
; CHECK-NEXT: fcmla v2.2s, v1.2s, v0.2s, #90
; CHECK-NEXT: fmov d0, d2
; CHECK-NEXT: ret
entry:
Expand All @@ -32,8 +32,8 @@ define <4 x float> @complex_mul_v4f32(<4 x float> %a, <4 x float> %b) {
; CHECK-LABEL: complex_mul_v4f32:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: movi v2.2d, #0000000000000000
; CHECK-NEXT: fcmla v2.4s, v0.4s, v1.4s, #0
; CHECK-NEXT: fcmla v2.4s, v0.4s, v1.4s, #90
; CHECK-NEXT: fcmla v2.4s, v1.4s, v0.4s, #0
; CHECK-NEXT: fcmla v2.4s, v1.4s, v0.4s, #90
; CHECK-NEXT: mov v0.16b, v2.16b
; CHECK-NEXT: ret
entry:
Expand All @@ -57,10 +57,10 @@ define <8 x float> @complex_mul_v8f32(<8 x float> %a, <8 x float> %b) {
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: movi v4.2d, #0000000000000000
; CHECK-NEXT: movi v5.2d, #0000000000000000
; CHECK-NEXT: fcmla v4.4s, v0.4s, v2.4s, #0
; CHECK-NEXT: fcmla v5.4s, v1.4s, v3.4s, #0
; CHECK-NEXT: fcmla v4.4s, v0.4s, v2.4s, #90
; CHECK-NEXT: fcmla v5.4s, v1.4s, v3.4s, #90
; CHECK-NEXT: fcmla v4.4s, v2.4s, v0.4s, #0
; CHECK-NEXT: fcmla v5.4s, v3.4s, v1.4s, #0
; CHECK-NEXT: fcmla v4.4s, v2.4s, v0.4s, #90
; CHECK-NEXT: fcmla v5.4s, v3.4s, v1.4s, #90
; CHECK-NEXT: mov v0.16b, v4.16b
; CHECK-NEXT: mov v1.16b, v5.16b
; CHECK-NEXT: ret
Expand All @@ -87,14 +87,14 @@ define <16 x float> @complex_mul_v16f32(<16 x float> %a, <16 x float> %b) {
; CHECK-NEXT: movi v17.2d, #0000000000000000
; CHECK-NEXT: movi v18.2d, #0000000000000000
; CHECK-NEXT: movi v19.2d, #0000000000000000
; CHECK-NEXT: fcmla v16.4s, v0.4s, v4.4s, #0
; CHECK-NEXT: fcmla v17.4s, v1.4s, v5.4s, #0
; CHECK-NEXT: fcmla v18.4s, v2.4s, v6.4s, #0
; CHECK-NEXT: fcmla v19.4s, v3.4s, v7.4s, #0
; CHECK-NEXT: fcmla v16.4s, v0.4s, v4.4s, #90
; CHECK-NEXT: fcmla v17.4s, v1.4s, v5.4s, #90
; CHECK-NEXT: fcmla v18.4s, v2.4s, v6.4s, #90
; CHECK-NEXT: fcmla v19.4s, v3.4s, v7.4s, #90
; CHECK-NEXT: fcmla v16.4s, v4.4s, v0.4s, #0
; CHECK-NEXT: fcmla v17.4s, v5.4s, v1.4s, #0
; CHECK-NEXT: fcmla v18.4s, v6.4s, v2.4s, #0
; CHECK-NEXT: fcmla v19.4s, v7.4s, v3.4s, #0
; CHECK-NEXT: fcmla v16.4s, v4.4s, v0.4s, #90
; CHECK-NEXT: fcmla v17.4s, v5.4s, v1.4s, #90
; CHECK-NEXT: fcmla v18.4s, v6.4s, v2.4s, #90
; CHECK-NEXT: fcmla v19.4s, v7.4s, v3.4s, #90
; CHECK-NEXT: mov v0.16b, v16.16b
; CHECK-NEXT: mov v1.16b, v17.16b
; CHECK-NEXT: mov v2.16b, v18.16b
Expand Down
28 changes: 14 additions & 14 deletions llvm/test/CodeGen/AArch64/complex-deinterleaving-f64-mul.ll
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Expand Up @@ -8,8 +8,8 @@ define <2 x double> @complex_mul_v2f64(<2 x double> %a, <2 x double> %b) {
; CHECK-LABEL: complex_mul_v2f64:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: movi v2.2d, #0000000000000000
; CHECK-NEXT: fcmla v2.2d, v0.2d, v1.2d, #0
; CHECK-NEXT: fcmla v2.2d, v0.2d, v1.2d, #90
; CHECK-NEXT: fcmla v2.2d, v1.2d, v0.2d, #0
; CHECK-NEXT: fcmla v2.2d, v1.2d, v0.2d, #90
; CHECK-NEXT: mov v0.16b, v2.16b
; CHECK-NEXT: ret
entry:
Expand All @@ -33,10 +33,10 @@ define <4 x double> @complex_mul_v4f64(<4 x double> %a, <4 x double> %b) {
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: movi v4.2d, #0000000000000000
; CHECK-NEXT: movi v5.2d, #0000000000000000
; CHECK-NEXT: fcmla v4.2d, v0.2d, v2.2d, #0
; CHECK-NEXT: fcmla v5.2d, v1.2d, v3.2d, #0
; CHECK-NEXT: fcmla v4.2d, v0.2d, v2.2d, #90
; CHECK-NEXT: fcmla v5.2d, v1.2d, v3.2d, #90
; CHECK-NEXT: fcmla v4.2d, v2.2d, v0.2d, #0
; CHECK-NEXT: fcmla v5.2d, v3.2d, v1.2d, #0
; CHECK-NEXT: fcmla v4.2d, v2.2d, v0.2d, #90
; CHECK-NEXT: fcmla v5.2d, v3.2d, v1.2d, #90
; CHECK-NEXT: mov v0.16b, v4.16b
; CHECK-NEXT: mov v1.16b, v5.16b
; CHECK-NEXT: ret
Expand All @@ -63,14 +63,14 @@ define <8 x double> @complex_mul_v8f64(<8 x double> %a, <8 x double> %b) {
; CHECK-NEXT: movi v17.2d, #0000000000000000
; CHECK-NEXT: movi v18.2d, #0000000000000000
; CHECK-NEXT: movi v19.2d, #0000000000000000
; CHECK-NEXT: fcmla v16.2d, v0.2d, v4.2d, #0
; CHECK-NEXT: fcmla v17.2d, v1.2d, v5.2d, #0
; CHECK-NEXT: fcmla v18.2d, v2.2d, v6.2d, #0
; CHECK-NEXT: fcmla v19.2d, v3.2d, v7.2d, #0
; CHECK-NEXT: fcmla v16.2d, v0.2d, v4.2d, #90
; CHECK-NEXT: fcmla v17.2d, v1.2d, v5.2d, #90
; CHECK-NEXT: fcmla v18.2d, v2.2d, v6.2d, #90
; CHECK-NEXT: fcmla v19.2d, v3.2d, v7.2d, #90
; CHECK-NEXT: fcmla v16.2d, v4.2d, v0.2d, #0
; CHECK-NEXT: fcmla v17.2d, v5.2d, v1.2d, #0
; CHECK-NEXT: fcmla v18.2d, v6.2d, v2.2d, #0
; CHECK-NEXT: fcmla v19.2d, v7.2d, v3.2d, #0
; CHECK-NEXT: fcmla v16.2d, v4.2d, v0.2d, #90
; CHECK-NEXT: fcmla v17.2d, v5.2d, v1.2d, #90
; CHECK-NEXT: fcmla v18.2d, v6.2d, v2.2d, #90
; CHECK-NEXT: fcmla v19.2d, v7.2d, v3.2d, #90
; CHECK-NEXT: mov v0.16b, v16.16b
; CHECK-NEXT: mov v1.16b, v17.16b
; CHECK-NEXT: mov v2.16b, v18.16b
Expand Down
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