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Timer, GIC, IRQ support for aarch64 #727
Timer, GIC, IRQ support for aarch64 #727
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Avoid using "magic" numbers as much as possible; instead, you should define const
s for things like affinity bitmaps and bitshifts.
Kindly add higher-level comments to each module and each function so we know what the module is for and what the function generally does. It's a bit hard to understand things with all of the acronyms; ideally the code (with comments) should be self-explanatory, such that the reader wouldn't have to fully know all details of the aarch64 interrupt spec to understand what the code is doing.
For example, someone reading the file gic/src/dist.rs
or cpu2
or cpu3
probably wouldn't know what it's for unless they were already intimately familiar with aarch64 spec terminology.
…eeded in all kinds of descriptors
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I think the latter half of kernel/interrupts/src/aarch64/mod.rs
should be moved into an "exception"-related crate or module, since they're not strictly about interrupt handling; they're mostly early/default exception handlers.
* Adds basic support for handling interrupts on aarch64. * Supports ARMv8 Generic Interrupt Controller (GIC), both versions 2 and 3, but is currently hardcoded for v3 which is selected in QEMU by our Makefile. Also supports GIC distributor and redistributor interfaces. * Only uses/supports (non-secure) Group 1 interrupts (IRQs), secure-mode Group 1 interrupts or Group 0 interrupts (e.g., FIQs). * Uses the existing interface on x86_64 as a model for accessing the GIC and registering/deregistering interrupts, though the interface is a bit ad-hoc and not yet complete. 22a88a0
This PR will help us discuss the support of these features for aarch64:
interrupts
crate (and maybe more crates)