Simple UART controller for FPGA written in VHDL

Expiremental Speech Recognition System using VHDL & MATLAB.

VHDL project to run a simple 8-bit computer very similar to the one built by Ben Eater (see https://eater.net)

UART to AXI Stream interface written in VHDL

Lightweight UART core in VHDL

The CYC1000 FPGA Remote System Upgrade project

Sends data from an ADC to a UART-USB interface

simple VHDL UART

VHDL Code for UART Tx and Rx modules. To be used for future projects.

VHDL codes for UART Interface; hardware communication protocol. contains Receiver & Transmitter units & RAM memory.

This design includes 1 start bit, 8 data bits and 1 stop bits.It was created with the Time-Fined State Machine structure using VHDL.

A game-of-life implementation for the FPGA4U board, with SDRAM, RS232 UART, and VGA controllers

SUBLEQ computer written in VHDL for an FPGA that runs Forth

ALINX-AX309-RTC-UART-VHDL-FPGA-Xilinx-Spartan6

FPGA Digital Hardware Design

"low cost" simple UART (less than 100 L.E.)

Kuantek University Program

General Purpose UART in VHDL

Lightweight UART implementation in VHDL for the lattice icestick

Using the DE10 Lite board, read an analogue signal (512 samples) and send the data out of a UART