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[nvgpu] Expose helper code from NVGPU to LLVM lowering (NFC). (#4235)
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OpenXLA would like to reuse code from `NVGPUOpPatternBase` for Sparsity
lowering. Currently this is done by patching `NVGPUToLLVMPass.cpp` to
add an extra pattern deriving from `NVGPUOpPatternBase`. Instead, we
would like to move this pattern to the downstream OpenXLA repository.

This change removes the `NVGPUOpPatternBase` base class and exposes the
core lowering code as a utility function (`rewriteAsPtxAsm()`) instead.
The existing patterns now directly inherit from `mlir::OpRewritePattern`
and use this utility function.

I hope that exposing an extra function is acceptable. I tried to balance
it with cleaning up the code a bit (e.g., no more CRTP, but of course
that's subjective).
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chsigg authored Jul 1, 2024
1 parent 8e96b71 commit 54960ca
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Showing 2 changed files with 213 additions and 211 deletions.
21 changes: 21 additions & 0 deletions third_party/nvidia/include/NVGPUToLLVM/NVGPUToLLVMPass.h
Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,14 @@
#define TRITON_CONVERSION_NVGPU_TO_LLVM_PASS_H

#include <memory>
#include <string>
#include <utility>
#include <vector>

#include "mlir/IR/Operation.h"
#include "mlir/IR/PatternMatch.h"
#include "mlir/IR/Value.h"
#include "mlir/Support/LogicalResult.h"

namespace mlir {

Expand All @@ -10,6 +18,19 @@ template <typename T> class OperationPass;

namespace triton {

namespace nvgpu {

using Constraints = std::vector<std::string>;
using OperandsAndConstraints = std::vector<std::pair<Value, std::string>>;

LogicalResult
rewriteAsPtxAsm(mlir::Operation *op, mlir::PatternRewriter &rewriter,
std::string ptxAsm,
const OperandsAndConstraints &operandsAndConstraints = {},
const Constraints &outputConstraints = {});

} // namespace nvgpu

std::unique_ptr<OperationPass<ModuleOp>> createConvertNVGPUToLLVMPass();

} // namespace triton
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