ucb-bar · iansseijelly · Jan 22, 2025 · Jan 22, 2025 · Jan 22, 2025
diff --git a/.gitignore b/.gitignore
@@ -1,3 +1,5 @@
 .vscode/
 build/
-
+*.log
+*.afdo
+*.txt
diff --git a/CMakeLists.txt b/CMakeLists.txt
@@ -76,7 +76,7 @@ endif()
 
 add_subdirectory(${CMAKE_SOURCE_DIR}/platform/${CHIP})
 
-add_compile_options(-O0)
+add_compile_options(-O1)
 add_compile_options(-Wall -Wextra)
 add_compile_options(-Wno-error=coverage-mismatch)
 

diff --git a/driver/rocket-chip/rocketcore/riscv_encoding.h b/driver/rocket-chip/rocketcore/riscv_encoding.h
@@ -1012,25 +1012,6 @@
 #define CSR_MHPMCOUNTER29H          0xb9d
 #define CSR_MHPMCOUNTER30H          0xb9e
 #define CSR_MHPMCOUNTER31H          0xb9f
-// custom csr for LBR functionalities
-#define CSR_LBR_CTRL 0x401
-#define CSR_LBR_NUM  0x402
-#define CSR_LBR_SRC0 0x403
-#define CSR_LBR_SRC1 0x404
-#define CSR_LBR_SRC2 0x405
-#define CSR_LBR_SRC3 0x406
-#define CSR_LBR_SRC4 0x407
-#define CSR_LBR_SRC5 0x408
-#define CSR_LBR_SRC6 0x409
-#define CSR_LBR_SRC7 0x40a
-#define CSR_LBR_DST0 0x40b
-#define CSR_LBR_DST1 0x40c
-#define CSR_LBR_DST2 0x40d
-#define CSR_LBR_DST3 0x40e
-#define CSR_LBR_DST4 0x40f
-#define CSR_LBR_DST5 0x410
-#define CSR_LBR_DST6 0x411
-#define CSR_LBR_DST7 0x412
 #define CAUSE_MISALIGNED_FETCH      0x0
 #define CAUSE_FAULT_FETCH           0x1
 #define CAUSE_ILLEGAL_INSTRUCTION   0x2
@@ -1474,24 +1455,6 @@ DECLARE_CSR(mhpmcounter28h, CSR_MHPMCOUNTER28H)
 DECLARE_CSR(mhpmcounter29h, CSR_MHPMCOUNTER29H)
 DECLARE_CSR(mhpmcounter30h, CSR_MHPMCOUNTER30H)
 DECLARE_CSR(mhpmcounter31h, CSR_MHPMCOUNTER31H)
-DECLARE_CSR(lbr_ctrl, CSR_LBR_CTRL)
-DECLARE_CSR(lbr_num, CSR_LBR_NUM)
-DECLARE_CSR(lbr_src0, CSR_LBR_SRC0)
-DECLARE_CSR(lbr_src1, CSR_LBR_SRC1)
-DECLARE_CSR(lbr_src2, CSR_LBR_SRC2)
-DECLARE_CSR(lbr_src3, CSR_LBR_SRC3)
-DECLARE_CSR(lbr_src4, CSR_LBR_SRC4)
-DECLARE_CSR(lbr_src5, CSR_LBR_SRC5)
-DECLARE_CSR(lbr_src6, CSR_LBR_SRC6)
-DECLARE_CSR(lbr_src7, CSR_LBR_SRC7)
-DECLARE_CSR(lbr_dst0, CSR_LBR_DST0)
-DECLARE_CSR(lbr_dst1, CSR_LBR_DST1)
-DECLARE_CSR(lbr_dst2, CSR_LBR_DST2)
-DECLARE_CSR(lbr_dst3, CSR_LBR_DST3)
-DECLARE_CSR(lbr_dst4, CSR_LBR_DST4)
-DECLARE_CSR(lbr_dst5, CSR_LBR_DST5)
-DECLARE_CSR(lbr_dst6, CSR_LBR_DST6)
-DECLARE_CSR(lbr_dst7, CSR_LBR_DST7)
 #endif
 
 #ifdef DECLARE_CAUSE

diff --git a/examples/pmu-tests/CMakeLists.txt b/examples/pmu-tests/CMakeLists.txt
@@ -2,7 +2,6 @@ set (TESTS
   pmu-test-load
   pmu-test-store
   pmu-test-inhibit
-  lbr-test
   ltrace-dma-test
   ltrace-hpm-test
   speedscope-test

diff --git a/examples/pmu-tests/src/foc-driver.c b/examples/pmu-tests/src/foc-driver.c
@@ -9,8 +9,9 @@
 #define NUM_SAMPLES 60 // 0 to 2pi, 60 steps
 
 #define BUS_VOLTAGE 3.3f // 3V3
-#define SOC_FREQ 25 // 25 MHz
-#define TIMER_PRESCALER 1000 // x cycle is 1 timer tick
+#define SOC_FREQ 25000000 // 25 MHz
+#define TIMER_FREQ 1000 // 1000 Hz
+#define TIMER_PRESCALER (SOC_FREQ / TIMER_FREQ)
 #define TIMER_AUTORELOAD 1000 // x timer ticks up + x timer ticks down = 1 pwm cycle
 
 void FOC_invParkTransform(float *v_alpha, float *v_beta, float v_q, float v_d, float sin_theta, float cos_theta) {

diff --git a/examples/pmu-tests/src/lbr-test.c b/examples/pmu-tests/src/lbr-test.c
diff --git a/lib/perf/CMakeLists.txt b/lib/perf/CMakeLists.txt
diff --git a/lib/perf/lbr.c b/lib/perf/lbr.c
diff --git a/lib/perf/lbr.h b/lib/perf/lbr.h
diff --git a/lib/perf/perf.h b/lib/perf/perf.h
diff --git a/scripts/perf/dump_lbr.py b/scripts/perf/dump_lbr.py