> generate verilog

薛立伟 Linux tianyi-virtual-machine 6.5.0-15-generic OSCPU#15~22.04.1-Ubuntu SMP PREEMPT_DYNAMIC Fri Jan 12 18:54:30 UTC 2 x86_64 x86_64 x86_64 GNU/Linux 21:09:02 up 34 min, 1 user, load average: 0.27, 0.34, 0.33
wele0612 · Jan 30, 2024 · c08825c · c08825c
1 parent 19ae2d1
commit c08825c
Showing 1 changed file with 3 additions and 0 deletions.
diff --git a/npc/playground/test/src/GCDSpec.scala b/npc/playground/test/src/GCDSpec.scala
@@ -15,6 +15,7 @@ import utest._
   * sbt 'testOnly gcd.GcdDecoupledTester'
   * }}}
   */
+  /*
 object GCDSpec extends ChiselUtestTester {
   val tests = Tests {
     test("GCD") {
@@ -45,4 +46,6 @@ object GCDSpec extends ChiselUtestTester {
       }
     }
   }
+  
 }
+*/