dts: Add initial support of USB PHYs

drivers/usb/device/usb_dc_stm32.c

@@ -258,14 +258,14 @@ static int usb_dc_stm32_clock_enable(void)
 #ifdef DT_USB_HS_BASE_ADDRESS
 
 
-#ifdef USB_HS_PHYC
+#ifdef DT_COMPAT_ST_STM32_USBPHYC
 	LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_OTGHSULPI);
 	LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_OTGPHYC);
 #else
 	/* Disable ULPI interface (for external high-speed PHY) clock */
 	LL_AHB1_GRP1_DisableClock(LL_AHB1_GRP1_PERIPH_OTGHSULPI);
 	LL_AHB1_GRP1_DisableClockLowPower(LL_AHB1_GRP1_PERIPH_OTGHSULPI);
-#endif /* USB_HS_PHYC */
+#endif /* DT_COMPAT_ST_STM32_USBPHYC */
 
 #endif /* DT_USB_HS_BASE_ADDRESS */
 
@@ -279,22 +279,22 @@ static u32_t usb_dc_stm32_get_maximum_speed(void)
 	 * If max-speed is not passed via DT, set it to USB controller's
 	 * maximum hardware capability.
 	 */
-#if defined(USB_HS_PHYC) && defined(DT_USB_HS_BASE_ADDRESS)
+#if defined(DT_COMPAT_ST_STM32_USBPHYC) && defined(DT_USB_HS_BASE_ADDRESS)
 	u32_t speed = USB_OTG_SPEED_HIGH;
 #else
 	u32_t speed = USB_OTG_SPEED_FULL;
-#endif /* USB_HS_PHYC && DT_USB_HS_BASE_ADDRESS */
+#endif /* DT_COMPAT_ST_STM32_USBPHYC && DT_USB_HS_BASE_ADDRESS */
 
 #ifdef DT_USB_MAXIMUM_SPEED
 
 	if (!strncmp(DT_USB_MAXIMUM_SPEED, "high-speed", 10)) {
 		speed = USB_OTG_SPEED_HIGH;
 	} else if (!strncmp(DT_USB_MAXIMUM_SPEED, "full-speed", 10)) {
-#if defined(USB_HS_PHYC) && defined(DT_USB_HS_BASE_ADDRESS)
+#if defined(DT_COMPAT_ST_STM32_USBPHYC) && defined(DT_USB_HS_BASE_ADDRESS)
 		speed = USB_OTG_SPEED_HIGH_IN_FULL;
 #else
 		speed = USB_OTG_SPEED_FULL;
-#endif /* USB_HS_PHYC && DT_USB_HS_BASE_ADDRESS */
+#endif /* DT_COMPAT_ST_STM32_USBPHYC && DT_USB_HS_BASE_ADDRESS */
 	} else if (!strncmp(DT_USB_MAXIMUM_SPEED, "low-speed", 9)) {
 		speed = USB_OTG_SPEED_LOW;
 	} else {
@@ -328,11 +328,11 @@ static int usb_dc_stm32_init(void)
 #endif
 	usb_dc_stm32_state.pcd.Init.dev_endpoints = DT_USB_NUM_BIDIR_ENDPOINTS;
 	usb_dc_stm32_state.pcd.Init.speed = usb_dc_stm32_get_maximum_speed();
-#if defined(USB_HS_PHYC) && defined(DT_USB_HS_BASE_ADDRESS)
+#if defined(DT_COMPAT_ST_STM32_USBPHYC) && defined(DT_USB_HS_BASE_ADDRESS)
 	usb_dc_stm32_state.pcd.Init.phy_itface = USB_OTG_HS_EMBEDDED_PHY;
 #else
 	usb_dc_stm32_state.pcd.Init.phy_itface = PCD_PHY_EMBEDDED;
-#endif /* USB_HS_PHYC */
+#endif /* DT_COMPAT_ST_STM32_USBPHYC */
 	usb_dc_stm32_state.pcd.Init.ep0_mps = USB_OTG_MAX_EP0_SIZE;
 	usb_dc_stm32_state.pcd.Init.vbus_sensing_enable = DISABLE;
 

dts/arm/st/f0/stm32f070.dtsi

@@ -19,13 +19,20 @@
 			label = "SPI_2";
 		};
 
+		usb_fs_phy: usbphy {
+			compatible = "usb-nop-xceiv";
+			#phy-cells = <0>;
+			label = "USB_FS_PHY";
+		};
+
 		usb: usb@40005c00 {
 			compatible = "st,stm32-usb";
 			reg = <0x40005c00 0x400>;
 			interrupts = <31 0>;
 			interrupt-names = "usb";
 			num-bidir-endpoints = <8>;
 			ram-size = <1024>;
+			phys = <&usb_fs_phy>;
 			status = "disabled";
 			label= "USB";
 		};

dts/arm/st/f0/stm32f072.dtsi

@@ -47,13 +47,20 @@
 			label = "SPI_2";
 		};
 
+		usb_fs_phy: usbphy {
+			compatible = "usb-nop-xceiv";
+			#phy-cells = <0>;
+			label = "USB_FS_PHY";
+		};
+
 		usb: usb@40005c00 {
 			compatible = "st,stm32-usb";
 			reg = <0x40005c00 0x400>;
 			interrupts = <31 0>;
 			interrupt-names = "usb";
 			num-bidir-endpoints = <8>;
 			ram-size = <1024>;
+			phys = <&usb_fs_phy>;
 			status = "disabled";
 			label= "USB";
 		};

dts/arm/st/f1/stm32f103X8.dtsi

@@ -31,6 +31,12 @@
 			label = "SPI_2";
 		};
 
+		usb_fs_phy: usbphy {
+			compatible = "usb-nop-xceiv";
+			#phy-cells = <0>;
+			label = "USB_FS_PHY";
+		};
+
 		usb: usb@40005c00 {
 			compatible = "st,stm32-usb";
 			reg = <0x40005c00 0x400>;
@@ -39,6 +45,7 @@
 			num-bidir-endpoints = <8>;
 			ram-size = <512>;
 			status = "disabled";
+			phys = <&usb_fs_phy>;
 			label= "USB";
 		};
 	};

dts/arm/st/f1/stm32f103Xb.dtsi

@@ -33,13 +33,20 @@
 			label = "SPI_2";
 		};
 
+		usb_fs_phy: usbphy {
+			compatible = "usb-nop-xceiv";
+			#phy-cells = <0>;
+			label = "USB_FS_PHY";
+		};
+
 		usb: usb@40005c00 {
 			compatible = "st,stm32-usb";
 			reg = <0x40005c00 0x400>;
 			interrupts = <20 0>;
 			interrupt-names = "usb";
 			num-bidir-endpoints = <8>;
 			ram-size = <512>;
+			phys = <&usb_fs_phy>;
 			status = "disabled";
 			label= "USB";
 		};

dts/arm/st/f2/stm32f2.dtsi

@@ -194,6 +194,12 @@
 			label = "UART_5";
 		};
 
+		otgfs_phy: otgfs_phy {
+			compatible = "usb-nop-xceiv";
+			#phy-cells = <0>;
+			label = "OTGFS_PHY";
+		};
+
 		usbotg_fs: usb@50000000 {
 			compatible = "st,stm32-otgfs";
 			reg = <0x50000000 0x40000>;
@@ -202,6 +208,7 @@
 			num-bidir-endpoints = <4>;
 			ram-size = <1280>;
 			maximum-speed = "full-speed";
+			phys = <&otgfs_phy>;
 			status = "disabled";
 			label = "OTGFS";
 		};

dts/arm/st/f3/stm32f3.dtsi

@@ -154,13 +154,20 @@
 			label = "SPI_1";
 		};
 
+		usb_fs_phy: usbphy {
+			compatible = "usb-nop-xceiv";
+			#phy-cells = <0>;
+			label = "USB_FS_PHY";
+		};
+
 		usb: usb@40005c00 {
 			compatible = "st,stm32-usb";
 			reg = <0x40005c00 0x400>;
 			interrupts = <20 0>;
 			interrupt-names = "usb";
 			num-bidir-endpoints = <8>;
 			ram-size = <512>;
+			phys = <&usb_fs_phy>;
 			status = "disabled";
 			label= "USB";
 		};

dts/arm/st/f4/stm32f4.dtsi

@@ -201,6 +201,12 @@
 			label = "I2S_1";
 		};
 
+		otgfs_phy: otgfs_phy {
+			compatible = "usb-nop-xceiv";
+			#phy-cells = <0>;
+			label = "OTGFS_PHY";
+		};
+
 		usbotg_fs: usb@50000000 {
 			compatible = "st,stm32-otgfs";
 			reg = <0x50000000 0x40000>;
@@ -209,6 +215,7 @@
 			num-bidir-endpoints = <4>;
 			ram-size = <1280>;
 			maximum-speed = "full-speed";
+			phys = <&otgfs_phy>;
 			status = "disabled";
 			label= "OTGFS";
 		};

dts/arm/st/f4/stm32f405.dtsi

@@ -163,6 +163,12 @@
 			};
 		};
 
+		otghs_fs_phy: otghs_fs_phy {
+			compatible = "usb-nop-xceiv";
+			#phy-cells = <0>;
+			label = "OTGHS_FS_PHY";
+		};
+
 		usbotg_hs: usb@40040000 {
 			compatible = "st,stm32-otghs", "st,stm32-otgfs";
 			reg = <0x40040000 0x40000>;
@@ -171,6 +177,7 @@
 			num-bidir-endpoints = <6>;
 			ram-size = <4096>;
 			maximum-speed = "full-speed";
+			phys = <&otghs_fs_phy>;
 			status = "disabled";
 			label= "OTGHS";
 		};

dts/arm/st/f4/stm32f446.dtsi

@@ -12,6 +12,12 @@
 			num-bidir-endpoints = <6>;
 		};
 
+		otghs_fs_phy: otghs_fs_phy {
+			compatible = "usb-nop-xceiv";
+			#phy-cells = <0>;
+			label = "OTGHS_FS_PHY";
+		};
+
 		usbotg_hs: usb@40040000 {
 			compatible = "st,stm32-otghs", "st,stm32-otgfs";
 			reg = <0x40040000 0x40000>;
@@ -20,6 +26,7 @@
 			num-bidir-endpoints = <9>;
 			ram-size = <4096>;
 			maximum-speed = "full-speed";
+			phys = <&otghs_fs_phy>;
 			status = "disabled";
 			label= "OTGHS";
 		};

dts/arm/st/f7/stm32f7.dtsi

@@ -531,6 +531,12 @@
 			};
 		};
 
+		otgfs_phy: otgfs_phy {
+			compatible = "usb-nop-xceiv";
+			#phy-cells = <0>;
+			label = "OTGFS_PHY";
+		};
+
 		usbotg_fs: usb@50000000 {
 			compatible = "st,stm32-otgfs";
 			reg = <0x50000000 0x40000>;
@@ -539,10 +545,17 @@
 			num-bidir-endpoints = <6>;
 			ram-size = <1280>;
 			maximum-speed = "full-speed";
+			phys = <&otgfs_phy>;
 			status = "disabled";
 			label = "OTGFS";
 		};
 
+		otghs_fs_phy: otghs_fs_phy {
+			compatible = "usb-nop-xceiv";
+			#phy-cells = <0>;
+			label = "OTGHS_FS_PHY";
+		};
+
 		usbotg_hs: usb@40040000 {
 			compatible = "st,stm32-otghs", "st,stm32-otgfs";
 			reg = <0x40040000 0x40000>;
@@ -551,6 +564,7 @@
 			num-bidir-endpoints = <9>;
 			ram-size = <4096>;
 			maximum-speed = "full-speed";
+			phys = <&otghs_fs_phy>;
 			status = "disabled";
 			label= "OTGHS";
 		};

dts/arm/st/f7/stm32f723.dtsi

@@ -8,8 +8,19 @@
 
 / {
 	soc {
+		usbphyc: usbphyc@40017c00 {
+			compatible = "st,stm32-usbphyc";
+			reg = <0x40017c00 0x400>;
+			#phy-cells = <0>;
+			label = "USBPHYC";
+		};
+
 		usbotg_hs: usb@40040000 {
+			phys = <&usbphyc>;
 			maximum-speed = "high-speed";
 		};
 	};
+
 };
+
+/delete-node/ &otghs_fs_phy;

dts/arm/st/l0/stm32l072.dtsi

@@ -57,13 +57,20 @@
 			label = "SPI_2";
 		};
 
+		otgfs_phy: otgfs_phy {
+			compatible = "usb-nop-xceiv";
+			#phy-cells = <0>;
+			label = "OTGFS_PHY";
+		};
+
 		usb: usb@40005c00 {
 			compatible = "st,stm32-usb";
 			reg = <0x40005c00 0x400>;
 			interrupts = <31 0>;
 			interrupt-names = "usb";
 			num-bidir-endpoints = <8>;
 			ram-size = <1024>;
+			phys = <&otgfs_phy>;
 			status = "disabled";
 			label= "USB";
 		};

dts/arm/st/l0/stm32l073.dtsi

@@ -56,13 +56,20 @@
 			label = "SPI_2";
 		};
 
+		otgfs_phy: otgfs_phy {
+			compatible = "usb-nop-xceiv";
+			#phy-cells = <0>;
+			label = "OTGFS_PHY";
+		};
+
 		usb: usb@40005c00 {
 			compatible = "st,stm32-usb";
 			reg = <0x40005c00 0x400>;
 			interrupts = <31 0>;
 			interrupt-names = "usb";
 			num-bidir-endpoints = <8>;
 			ram-size = <1024>;
+			phys = <&otgfs_phy>;
 			status = "disabled";
 			label= "USB";
 		};

dts/arm/st/l4/stm32l432.dtsi

@@ -8,13 +8,20 @@
 
 / {
 	soc {
+		otgfs_phy: otgfs_phy {
+			compatible = "usb-nop-xceiv";
+			#phy-cells = <0>;
+			label = "OTGFS_PHY";
+		};
+
 		usb: usb@40006800 {
 			compatible = "st,stm32-usb";
 			reg = <0x40006800 0x40000>;
 			interrupts = <67 0>;
 			interrupt-names = "usb";
 			num-bidir-endpoints = <8>;
 			ram-size = <1024>;
+			phys = <&otgfs_phy>;
 			status = "disabled";
 			label = "USB";
 		};

dts/arm/st/l4/stm32l475.dtsi

@@ -89,6 +89,12 @@
 			label = "SPI_3";
 		};
 
+		otgfs_phy: otgfs_phy {
+			compatible = "usb-nop-xceiv";
+			#phy-cells = <0>;
+			label = "OTGFS_PHY";
+		};
+
 		usbotg_fs: otgfs@50000000 {
 			compatible = "st,stm32-otgfs";
 			reg = <0x50000000 0x40000>;
@@ -97,6 +103,7 @@
 			num-bidir-endpoints = <6>;
 			ram-size = <1280>;
 			maximum-speed = "full-speed";
+			phys = <&otgfs_phy>;
 			status = "disabled";
 			label= "OTGFS";
 		};