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drivers: gpio: miwu: Add miwu and gpio drivers in npcx7 series. #27578
drivers: gpio: miwu: Add miwu and gpio drivers in npcx7 series. #27578
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From the build error report, it shows "gen_isr_tables.py: error: multiple registrations at table_index 61 for irq 61 (0x3d)". Dig the source of gen_isr_table, the root cause is that the test suit also uses IRQ61 (https://github.com/zephyrproject-rtos/zephyr/blob/master/tests/kernel/gen_isr_table/src/main.c#L283) which is the same as miwu2 group2 interrupt. |
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Hi @sjg20 : |
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Looks interesting, but there's no public information I can find on the board or its MCU, or where to buy the board.
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Sorry, I didn't have a change to finish reviewing. I just a few minor comments. Looks good to me so far though
Hi @pabigot: Hi @michalsch: |
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Thanks. But my main point is an ongoing concern with adopting into mainline Zephyr hardware (boards, SoCs, shields) that are not generally available. This introduces a near-permanent maintenance burden as tree-wide refactoring often requires their code be changed, but the people making those changes can't easily verify functionality. I really hate changing something when I can't verify I didn't break it; so I have 26 Zephyr target boards spanning almost all SoC families. More than half of those are not of interest to the people who fund most of my Zephyr work. When the documentation is also not available it becomes a bigger problem. Note that this is my personal view, which others may or may not share. There is no documented policy in Zephyr providing non-technical criteria for adding new content. Since this target has already been accepted clearly the new peripheral implementations must go in. But the level of review I can give is seriously impeded by lack of technical documentation and the ability to test. |
I think your concern about testing wide-scale changes/refactors is valid. I know I have heard something about a hardware test matrix that we can run tests on that is distributed out to different chip vendors; would adding more testing for the npcx product line address some of your concerns here? @nashif for more details on test matix. |
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@pabigot and @jett: |
This was already discussed in multiple occasions and the consensus was that support for unreleased hardware and missing documentation of the hardware is acceptable as long ad the drivers, SoCs and boards are being actively maintained with someone available to answer any technical questions. If this changes over time and some hardware becomes unmaintained and it prevents us from moving forward because of lack of response or broken support, we will then reserve the right to disable or remove such support. Supporting hardware that is still unreleased is often related to product development and is an indicator that the project is doing well in general :) Linux is full of drivers and hardware support that is still not released, there is no way we can make progress only with release hardware (that is maybe how we started 5 years ago, but we are way beyond that). |
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The remaining comments are relatively minor. This PR looks good to me overall! Can you make a sweep through all of the remaining open comments and address them, please?
callback->source = source; | ||
} | ||
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int soc_miwu_manage_gpio_callback(struct miwu_io_callback *cb, bool set) |
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Why can't we use gpio_manage_callback
in gpio_utils.h here instead
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First, the parameter is different between soc_miwu_manage_gpio_callback() and gpio_manage_callback() although 'struct miwu_io_callback *cb' and struct gpio_callback *callback share the same memory space. In this PR, it won't increase code size since we don't call any gpio_manage_callback() and replace it with soc_miwu_manage_gpio_callback().
Of course, we can cast 'struct miwu_io_callback *' back to 'struct gpio_callback * and call gpio_manage_callback() in MIWU driver directly. But I thought the current one is more straightforward.
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/* Driver config */ | ||
struct gpio_npcx_config { | ||
/* gpio_driver_config needs to be first */ |
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+1; there do seem to still be /* instead of /** here
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@jettr I have swept all remaining comments. Most of them are resolved and related changes were updated. But a few comments are still open and I gave replies for further discussions. Please check them, thanks. |
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Looks good!
The device Multi-Input Wake-Up Unit (MIWU) supports the embedded controller (EC) to exit 'Sleep' or 'Deep Sleep' power state which allows chip has better power consumption. Also, it provides signal conditioning such as 'Level' and 'Edge' trigger type and grouping of external interrupt sources of NVIC. The NPCX series has three identical MIWU modules: MIWU0, MIWU1, MIWU2. Together, they support a total of over 140 internal and/or external wake-up sources. In this CL, we use device tree files to present the relationship bewteen MIWU and the other devices in different npcx series. For npcx7 series, it include: 1. npcx7-miwus-int-map.dtsi: it presents relationship between MIWU group and NVIC interrupt in npcx7. Please notice it isn't 1-to-1 mapping. 2. npcx7-miwus-wui-map.dtsi: it presents relationship between input of MIWU and its source device such as gpio, timer, eSPI VWs and so on. This CL also includes: 1. Add MIWU device tree declarations. 2. MIWU api function declarations and implementation to configure signal conditions and callback function mechanism. They can be be classified into two types. One is for GPIO which connects original gpio callback implemetation and the other is for generic devices such as timer, eSPI, and so on. Signed-off-by: Mulin Chao <[email protected]>
Add gpio support for Nuvoton NPCX series. This CL includes: 1. Add GPIO device tree declarations. 2. Introduce wui_maps property in yaml file to present relationship between Wake-Up Input (WUI) and 8 IOs belong to the device. 3. Zephyr GPIO api implementation. 4. GPIO callback functions implementation with MIWU api functions. 5. Overlay file for gpio basic tests Signed-off-by: Mulin Chao <[email protected]>
This CL configures the UART wake-up event triggered from a falling edge (START condition) on CR_SIN pin. It also includes: 1. Introduce wui_maps property in yaml file to present relationship between Wake-Up Input (WUI) and UART device. 2. Implement wake-up mechanism by MIWU api functions. Signed-off-by: Mulin Chao <[email protected]>
In NPCX7M6FB, it uses some the IRQs at the end of the vector table, for example, the irq 60 and 61 used for Multi-Input Wake-Up Unit (MIWU) device by default, and conflicts with isr used for testing. Moving IRQs for this test suite to solve the issue. Signed-off-by: Mulin Chao <[email protected]>
Remove the '_t' suffix of device register structure since it is used mainly with typedefs. Signed-off-by: Mulin Chao <[email protected]>
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Replace npcx register base address type, uint32_t, with uintptr_t. It is easier to know what type of base address and for linear addresses treated as integral values. This CL also modified IS_BIT_SET() macro function to fit MISRA code guidelines. Signed-off-by: Mulin Chao <[email protected]>
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Sorry for the delay. Was OOO and had to catch-up. |
Add Multi-Input Wake-Up Unit (MIWU) and GPIO driver implementations in Nuvoton npcx7 series..
It is separated into three commits. First, commit introduces MIWU which provides signal conditioning such as 'Level' and 'Edge' trigger type and grouping of NVIC's external interrupt sources. It's crucial since many devices such as gpio, timer, eSPI VW signals relies on it for interrupt handling. Beside gpio driver implementation, the other commits also demonstrate how we handle wake-up signals of gpio and uart by MIWU api functions.