[WIP] Adding STM32 H7 Nuttx Based bootloader #13357

davids5 · 2019-11-02T12:37:16Z

USB Works but needs

testing
- UART
- Odd file sizes
size minimization (remove OS parts not used)
diff bl.c & bl.h back to Bootloader repo PR and create sub module of them to share. - Per Discussion with @dagar we will carry a copy of the bl.h and bl.c - the long term plans is to move the bootloader src in tree and pull the libs at build time only.

bkueng · 2019-11-04T09:20:57Z

Cool, works on my board.

davids5 · 2019-11-06T14:30:36Z

@bkueng - stm32h7_support has been rebased on master and this on stm32h7_support.
Using current nuttx from yesterday.

I have upped the clock speed to 480Mhz.

480 Mhz (not dcach):
 PID COMMAND                   CPU(ms) CPU(%)  USED/STACK PRIO(BASE) STATE FD
   0 Idle Task                  101332 59.223   244/  512   0 (  0)  READY  3
   1 hpwork                          0  0.000   344/ 1260 249 (249)  w:sig  3
   2 lpwork                         76  0.088   576/ 1516  50 ( 50)  w:sig  8
   3 init                          590  0.000  1728/ 2604 100 (100)  w:sem  3
   4 wq:manager                      0  0.000   384/ 1252 243 (243)  w:sem  3
  69 wq:att_pos_ctrl              9568  5.736  4768/ 6596 244 (244)  READY  3
  16 dataman                        63  0.000   752/ 1204  90 ( 90)  w:sem  4
  19 wq:lp_default                  11  0.000   780/ 1700 205 (205)  w:sem  3
  21 wq:I2C1                       662  0.441   788/ 1244 248 (248)  w:sem  3
  25 wq:hp_default                  16  0.000   488/ 1500 243 (243)  w:sem  3
  32 wq:SPI1                     40660 24.007   976/ 1396 254 (254)  w:sem  3
  42 wq:I2C3                       472  0.353   808/ 1244 246 (246)  READY  3
  46 wq:SPI4                       555  0.353   624/ 1396 251 (251)  w:sem  3
  63 sensors                      3186  1.853  1520/ 1964 237 (237)  READY  9
 183 log_writer_file                 0  0.000   368/ 1164  60 ( 60)  w:sem  3
  71 commander                     918  0.441  1624/ 3212 140 (140)  READY  6
  72 wq:rate_ctrl                 2591  1.500   872/ 1596 255 (255)  w:sem  3
  73 commander_low_prio              2  0.000   560/ 2996  50 ( 50)  w:sem  6
 113 gps                           248  0.176  1024/ 1540 208 (208)  READY  4
 148 mavlink_if0                  1770  0.882  1712/ 2484 100 (100)  w:sig  4
 150 mavlink_rcv_if0               425  0.176  2480/ 3964 175 (175)  w:sem  4
 164 navigator                     143  0.000   920/ 1764 105 (105)  w:sem  4
 180 logger                        525  0.353  1280/ 3644 233 (233)  w:sem  3
 185 top                          2703  2.118  1560/ 2028 248 (248)  RUN    3

Processes: 24 total, 7 running, 17 sleeping, max FDs: 20
CPU usage: 38.48% tasks, 2.29% sched, 59.22% idle
DMA Memory: 5120 total, 1024 used 1024 peak
Uptime: 170.638s total, 101.332s idle

INFO  [sd_bench] Using block size = 4096 bytes, sync=0
INFO  [sd_bench]
INFO  [sd_bench] Testing Sequential Write Speed...
INFO  [sd_bench]   Run  0:   395.85 KB/s, max write time: 320 ms (=  12.50 KB/s), fsync: 4 ms
INFO  [sd_bench]   Run  1:   404.17 KB/s, max write time: 316 ms (=  12.66 KB/s), fsync: 4 ms
INFO  [sd_bench]   Run  2:   468.47 KB/s, max write time: 14 ms (= 285.71 KB/s), fsync: 4 ms
INFO  [sd_bench]   Run  3:   352.36 KB/s, max write time: 462 ms (=   8.66 KB/s), fsync: 5 ms
INFO  [sd_bench]   Run  4:   466.90 KB/s, max write time: 13 ms (= 307.69 KB/s), fsync: 4 ms
INFO  [sd_bench]   Avg   :   417.38 KB/s
nsh> sd_bench
INFO  [sd_bench] Using block size = 4096 bytes, sync=0
INFO  [sd_bench]
INFO  [sd_bench] Testing Sequential Write Speed...
INFO  [sd_bench]   Run  0:   411.17 KB/s, max write time: 140 ms (=  28.57 KB/s), fsync: 123 ms
INFO  [sd_bench]   Run  1:   381.77 KB/s, max write time: 392 ms (=  10.20 KB/s), fsync: 5 ms
INFO  [sd_bench]   Run  2:   284.40 KB/s, max write time: 797 ms (=   5.02 KB/s), fsync: 7 ms
INFO  [sd_bench]   Run  3:   473.10 KB/s, max write time: 13 ms (= 307.69 KB/s), fsync: 4 ms
INFO  [sd_bench]   Run  4:   461.54 KB/s, max write time: 55 ms (=  72.73 KB/s), fsync: 4 ms
INFO  [sd_bench]   Avg   :   401.64 KB/s
nsh> sd_bench
INFO  [sd_bench] Using block size = 4096 bytes, sync=0
INFO  [sd_bench]
INFO  [sd_bench] Testing Sequential Write Speed...
INFO  [sd_bench]   Run  0:   430.65 KB/s, max write time: 181 ms (=  22.10 KB/s), fsync: 4 ms
INFO  [sd_bench]   Run  1:   470.64 KB/s, max write time: 14 ms (= 285.71 KB/s), fsync: 4 ms
INFO  [sd_bench]   Run  2:   289.24 KB/s, max write time: 434 ms (=   9.22 KB/s), fsync: 5 ms
INFO  [sd_bench]   Run  3:   455.84 KB/s, max write time: 54 ms (=  74.07 KB/s), fsync: 5 ms
INFO  [sd_bench]   Run  4:   468.74 KB/s, max write time: 18 ms (= 222.22 KB/s), fsync: 4 ms
INFO  [sd_bench]   Avg   :   423.04 KB/s


416:-------------------------------------

 PID COMMAND                   CPU(ms) CPU(%)  USED/STACK PRIO(BASE) STATE FD
   0 Idle Task                   52188 53.968   244/  512   0 (  0)  READY  3
   1 hpwork                          0  0.000   344/ 1260 249 (249)  w:sig  3
   2 lpwork                         51  0.000   592/ 1516  50 ( 50)  w:sig  8
   3 init                          655  0.000  1728/ 2604 100 (100)  w:sem  3
   4 wq:manager                      0  0.000   368/ 1252 243 (243)  w:sem  3
  69 wq:att_pos_ctrl              6312  6.701  4768/ 6596 244 (244)  READY  3
  16 dataman                        72  0.000   752/ 1204  90 ( 90)  w:sem  4
  19 wq:lp_default                   7  0.000   780/ 1700 205 (205)  w:sem  3
  21 wq:I2C1                       430  0.440   920/ 1244 248 (248)  READY  3
  25 wq:hp_default                  11  0.000   488/ 1500 243 (243)  w:sem  3
  32 wq:SPI1                     25385 26.278   892/ 1396 254 (254)  w:sem  3
  42 wq:I2C3                       305  0.264   788/ 1244 246 (246)  READY  3
  46 wq:SPI4                       365  0.352   624/ 1396 251 (251)  w:sem  3
  63 sensors                      2094  2.204  1308/ 1964 237 (237)  READY  9
 183 log_writer_file                 0  0.000   368/ 1164  60 ( 60)  w:sem  3
  71 commander                     658  0.529  1600/ 3212 140 (140)  READY  6
  72 wq:rate_ctrl                 1833  1.940   992/ 1596 255 (255)  w:sem  3
  73 commander_low_prio              1  0.000   560/ 2996  50 ( 50)  w:sem  6
 113 gps                           164  0.088   984/ 1540 208 (208)  READY  4
 148 mavlink_if0                  1277  1.058  1640/ 2484 100 (100)  READY  4
 150 mavlink_rcv_if0               286  0.264  2480/ 3964 175 (175)  w:sem  4
 164 navigator                     122  0.088   920/ 1764 105 (105)  w:sem  4
 180 logger                        374  0.352  1280/ 3644 233 (233)  w:sem  3
 185 top                          2202  2.380  1560/ 2028 248 (248)  RUN    3

Processes: 24 total, 9 running, 15 sleeping, max FDs: 20
CPU usage: 42.95% tasks, 3.09% sched, 53.97% idle
DMA Memory: 5120 total, 1024 used 1024 peak
Uptime: 97.658s total, 52.188s idle
nsh>

nsh> sd_bench
INFO  [sd_bench] Using block size = 4096 bytes, sync=0
INFO  [sd_bench]
INFO  [sd_bench] Testing Sequential Write Speed...
INFO  [sd_bench]   Run  0:   458.84 KB/s, max write time: 14 ms (= 285.71 KB/s), fsync: 4 ms
INFO  [sd_bench]   Run  1:   456.43 KB/s, max write time: 19 ms (= 210.53 KB/s), fsync: 5 ms
INFO  [sd_bench]   Run  2:   364.07 KB/s, max write time: 412 ms (=   9.71 KB/s), fsync: 4 ms
INFO  [sd_bench]   Run  3:   299.02 KB/s, max write time: 718 ms (=   5.57 KB/s), fsync: 4 ms
INFO  [sd_bench]   Run  4:   460.85 KB/s, max write time: 14 ms (= 285.71 KB/s), fsync: 4 ms
INFO  [sd_bench]   Avg   :   407.86 KB/s
nsh> sd_bench
INFO  [sd_bench] Using block size = 4096 bytes, sync=0
INFO  [sd_bench]
INFO  [sd_bench] Testing Sequential Write Speed...
INFO  [sd_bench]   Run  0:   324.78 KB/s, max write time: 516 ms (=   7.75 KB/s), fsync: 4 ms
INFO  [sd_bench]   Run  1:   457.63 KB/s, max write time: 15 ms (= 266.67 KB/s), fsync: 4 ms
INFO  [sd_bench]   Run  2:   262.53 KB/s, max write time: 647 ms (=   6.18 KB/s), fsync: 5 ms
INFO  [sd_bench]   Run  3:   262.70 KB/s, max write time: 486 ms (=   8.23 KB/s), fsync: 5 ms
INFO  [sd_bench]   Run  4:   458.38 KB/s, max write time: 15 ms (= 266.67 KB/s), fsync: 5 ms
INFO  [sd_bench]   Avg   :   353.17 KB/s
nsh> sd_bench
INFO  [sd_bench] Using block size = 4096 bytes, sync=0
INFO  [sd_bench]
INFO  [sd_bench] Testing Sequential Write Speed...
INFO  [sd_bench]   Run  0:   459.68 KB/s, max write time: 14 ms (= 285.71 KB/s), fsync: 4 ms
INFO  [sd_bench]   Run  1:   403.52 KB/s, max write time: 205 ms (=  19.51 KB/s), fsync: 5 ms
INFO  [sd_bench]   Run  2:   270.85 KB/s, max write time: 442 ms (=   9.05 KB/s), fsync: 5 ms
INFO  [sd_bench]   Run  3:   455.77 KB/s, max write time: 14 ms (= 285.71 KB/s), fsync: 6 ms
INFO  [sd_bench]   Run  4:   371.92 KB/s, max write time: 384 ms (=  10.42 KB/s), fsync: 5 ms
INFO  [sd_bench]   Avg   :   392.37 KB/s
nsh>

bys1123 · 2019-11-06T14:38:12Z

I‘m curious about why upped the clock? Will it cause unstablity?

davids5 · 2019-11-06T14:48:21Z

@bys1123 - the HW supports it and with the work I did in upstream NuttX it is stable now and we get +4% more CPU even without dcache enabled.

bys1123 · 2019-11-06T15:11:41Z

Ha, Thanks!
https://www.st.com/en/microcontrollers-microprocessors/stm32h743-753.html

davids5 requested a review from bkueng November 2, 2019 12:37

davids5 force-pushed the stm32h7_support branch from 0dae69e to 5db13f7 Compare November 5, 2019 19:12

davids5 force-pushed the stm32h7_support_bootloader branch from b6f2579 to 71f5e2b Compare November 5, 2019 19:52

davids5 mentioned this pull request Nov 6, 2019

[WIP] Added STM32H7 support and Durandal #13065

Closed

8 tasks

davids5 force-pushed the stm32h7_support branch from 5db13f7 to 795d52c Compare November 6, 2019 19:32

davids5 force-pushed the stm32h7_support_bootloader branch from 0631d70 to cc17731 Compare November 6, 2019 19:33

davids5 force-pushed the stm32h7_support branch 5 times, most recently from fefc228 to 3e16126 Compare November 7, 2019 13:13

davids5 added 5 commits November 7, 2019 06:42

NuttX based PX4 bootloader

91405b3

durandal-v1 Nuttx Based PX4 bootloader

e7947f1

Add Durandal bootloader to build

81c1a57

durandal:Run at 480 Mhz

08bbbbb

durandal bootloader:Run at 480 Mhz

1ae916f

davids5 force-pushed the stm32h7_support_bootloader branch from cc17731 to 1ae916f Compare November 7, 2019 14:43

davids5 requested a review from julianoes November 7, 2019 14:53

davids5 merged this pull request into stm32h7_support Nov 7, 2019

mhkabir deleted the stm32h7_support_bootloader branch November 7, 2019 15:03

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[WIP] Adding STM32 H7 Nuttx Based bootloader #13357

[WIP] Adding STM32 H7 Nuttx Based bootloader #13357

davids5 commented Nov 2, 2019 •

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bkueng commented Nov 4, 2019

davids5 commented Nov 6, 2019

bys1123 commented Nov 6, 2019

davids5 commented Nov 6, 2019

bys1123 commented Nov 6, 2019

[WIP] Adding STM32 H7 Nuttx Based bootloader #13357

[WIP] Adding STM32 H7 Nuttx Based bootloader #13357

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davids5 commented Nov 2, 2019 • edited Loading

bkueng commented Nov 4, 2019

davids5 commented Nov 6, 2019

bys1123 commented Nov 6, 2019

davids5 commented Nov 6, 2019

bys1123 commented Nov 6, 2019

davids5 commented Nov 2, 2019 •

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