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cpu/esp32: add ESP32-C3 support in makefiles #18341

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merged 3 commits into from
Jul 21, 2022
Merged

cpu/esp32: add ESP32-C3 support in makefiles #18341

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4ed925a
cpu/esp32: add ESP32-C3 support in makefiles
gschorcht Jul 20, 2022
d6aeea7
cpu/esp32: rename architecture to riscv_esp32 to rv32
gschorcht Jul 20, 2022
0645371
cpu/esp_common: rename architecture to riscv_esp32 to rv32
gschorcht Jul 20, 2022
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3 changes: 3 additions & 0 deletions cpu/esp32/Makefile.features
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Original file line number Diff line number Diff line change
@@ -1,6 +1,9 @@
ifneq (,$(filter esp32,$(CPU_FAM)))
CPU_ARCH = xtensa
CPU_CORE = xtensa-lx6
else ifneq (,$(filter esp32c3,$(CPU_FAM)))
CPU_ARCH = rv32
CPU_CORE = rv32imc
else
$(error Unkwnown ESP32x SoC variant (family))
endif
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2 changes: 1 addition & 1 deletion cpu/esp32/Makefile.include
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Expand Up @@ -22,7 +22,7 @@ include $(RIOTCPU)/esp_common/Makefile.include

ifeq (xtensa,$(CPU_ARCH))
TARGET_ARCH ?= xtensa-$(CPU_FAM)-elf
else ifeq (riscv_esp32,$(CPU_ARCH))
else ifeq (rv32,$(CPU_ARCH))
TARGET_ARCH ?= riscv32-esp-elf
else
$(error Unkwnown ESP32x SoC architecture)
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2 changes: 1 addition & 1 deletion cpu/esp_common/Makefile.dep
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Expand Up @@ -25,7 +25,7 @@ ifeq (xtensa,$(CPU_ARCH))
USEMODULE += xtensa
endif

ifeq (riscv_esp32,$(CPU_ARCH))
ifeq (rv32,$(CPU_ARCH))
USEMODULE += esp_riscv
endif

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2 changes: 1 addition & 1 deletion cpu/esp_common/Makefile.features
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Expand Up @@ -26,7 +26,7 @@ ifeq (xtensa,$(CPU_ARCH))
FEATURES_PROVIDED += arch_esp_xtensa
endif

ifeq (riscv_esp32,$(CPU_ARCH))
ifeq (rv32,$(CPU_ARCH))
FEATURES_PROVIDED += arch_esp_riscv
endif

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