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cpu/gd32v: add periph_spi support #19214

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Feb 1, 2023
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boards/sipeed-longan-nano: add SPI configuration
gschorcht committed Feb 1, 2023

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miri64 Martine Lenders
commit 8d3369acc77bbc2e8d8d1fc6e7915bfc491c596b
1 change: 1 addition & 0 deletions boards/sipeed-longan-nano/Kconfig
Original file line number Diff line number Diff line change
@@ -16,6 +16,7 @@ config BOARD_SIPEED_LONGAN_NANO
select BOARD_HAS_LXTAL
select HAS_PERIPH_I2C
select HAS_PERIPH_PWM
select HAS_PERIPH_SPI
select HAS_PERIPH_TIMER
select HAS_PERIPH_UART
select HAVE_SAUL_GPIO
1 change: 1 addition & 0 deletions boards/sipeed-longan-nano/Makefile.features
Original file line number Diff line number Diff line change
@@ -3,6 +3,7 @@ CPU_MODEL = gd32vf103cbt6
# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_i2c
FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart

12 changes: 10 additions & 2 deletions boards/sipeed-longan-nano/doc.txt
Original file line number Diff line number Diff line change
@@ -35,7 +35,7 @@ on-board components:
| DAC | 2 x 12-bit channel | no |
| UART | - | yes |
| USART | 3 | yes |
| SPI | 3 | no |
| SPI | 3 | yes |
| I2C | 2 x Fast Mode 400 kHz | yes |
| I2S | 2 | no |
| CAN | 2 x CAN 2.0B with up to 1 Mbps | no |
@@ -58,9 +58,13 @@ MCU pins and their configuration in RIOT.

| MCU Pin | MCU Peripheral | RIOT Peripheral | Board Function | Remark |
|:--------|:---------------|:-----------------|:---------------|:-----------------------------|
| PA0 | BOOT0 | | BTN0 | |
| PA0 | BOOT0 | BTN0 | BOOT | |
| PA1 | | PWM_DEV(0) CH0 | LED1 green | |
| PA2 | | PWM_DEV(0) CH1 | LED2 blue | |
| PA4 | SPI1 CS | SPI_DEV(1) CS | | |
| PA5 | SPI1 SCLK | SPI_DEV(1) SCLK | | |
| PA6 | SPI1 MISO | SPI_DEV(1) MISO | | |
| PA7 | SPI1 MOSI | SPI_DEV(1) MOSI | | |
| PA9 | USART0 TX | UART_DEV(0) TX | UART TX | |
| PA10 | USART0 RX | UART_DEV(0) RX | UART RX | |
| PB6 | I2C0 SCL | I2C_DEV(0) SCL | | |
@@ -69,6 +73,10 @@ MCU pins and their configuration in RIOT.
| PB9 | | PWM_DEV(1) CH1 | | N/A if CAN is used |
| PB10 | I2C1 SCL | I2C_DEV(1) SCL | | |
| PB11 | I2C1 SDA | I2C_DEV(1) SDA | | |
| PB12 | SPI0 CS | SPI_DEV(0) CS | | |
| PB13 | SPI0 SCLK | SPI_DEV(0) SCLK | | |
| PB14 | SPI0 MISO | SPI_DEV(0) MISO | | |
| PB15 | SPI0 MOSI | SPI_DEV(0) MOSI | | |
| PC13 | | | LED0 red | |

## Flashing the Device
21 changes: 21 additions & 0 deletions boards/sipeed-longan-nano/include/board.h
Original file line number Diff line number Diff line change
@@ -53,6 +53,27 @@ extern "C" {
#define LED_BLUE_PIN LED2_PIN /**< LED2 is blue */
/** @} */

#if defined(MODULE_SDCARD_SPI)
#define SDCARD_SPI_PARAM_SPI SPI_DEV(0)
#define SDCARD_SPI_PARAM_CS GPIO_PIN(PORT_B, 12)
#define SDCARD_SPI_PARAM_CLK GPIO_PIN(PORT_B, 13)
#define SDCARD_SPI_PARAM_MISO GPIO_PIN(PORT_B, 14)
#define SDCARD_SPI_PARAM_MOSI GPIO_PIN(PORT_B, 15)
#endif

#if defined(MODULE_ST7735) && defined(CONFIG_SIPEED_LONGAN_NANO_WITH_TFT)
#define ST7735_PARAM_SPI SPI_DEV(1) /**< SPI device */
#define ST7735_PARAM_SPI_CLK SPI_CLK_5MHZ /**< SPI clock frequency */
#define ST7735_PARAM_SPI_MODE SPI_MODE_0 /**< SPI mode */
#define ST7735_PARAM_CS GPIO_PIN(PORT_B, 2) /**< Chip Select pin */
#define ST7735_PARAM_DCX GPIO_PIN(PORT_B, 0) /**< DCX pin */
#define ST7735_PARAM_RST GPIO_PIN(PORT_B, 1) /**< Reset pin */
#define ST7735_PARAM_RGB 1 /**< RGB mode enable */
#define ST7735_PARAM_INVERTED 0 /**< Inverted mode enable */
#define ST7735_PARAM_NUM_LINES 160U /**< Number of lines */
#define ST7735_PARAM_RGB_CHANNELS 80U /**< Number of columns */
#endif

#ifdef __cplusplus
}
#endif
1 change: 1 addition & 0 deletions boards/sipeed-longan-nano/include/periph_conf.h
Original file line number Diff line number Diff line change
@@ -37,6 +37,7 @@
#include "periph_common_conf.h"

#include "cfg_i2c_default.h"
#include "cfg_spi_default.h"
#include "cfg_timer_default.h"
#include "cfg_uart_default.h"