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kinetis: Unify cpu.c, update clock initialization code #7379

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Aug 1, 2017

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@jnohlgard jnohlgard commented Jul 18, 2017

Unify cpu_init for all Kinetis CPUs to reduce code duplication. Updated the MCG driver implementation to make the configuration easier. Most clock settings are initialized by kinetis_mcg_init() called from cpu_init. Board specific external clock source initialization (FRDM-K64F, PhyNode) needs to be performed in board_init instead of in cpu_init.

The clock dividers (SIM_CLKDIV1) previously set in various places for different boards are now unified and handled directly by the MCG driver.

@jnohlgard jnohlgard added Platform: ARM Platform: This PR/issue effects ARM-based platforms Type: cleanup The issue proposes a clean-up / The PR cleans-up parts of the codebase / documentation Type: enhancement The issue suggests enhanceable parts / The PR enhances parts of the codebase / documentation labels Jul 18, 2017
@jnohlgard jnohlgard added this to the Release 2017.10 milestone Jul 18, 2017
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jnohlgard commented Jul 18, 2017

Testing status:

  • frdm-k22f
  • frdm-k64f
  • mulle
  • pba-d-01-kw2x

@haukepetersen @aabadie @kYc0o do you have access to any of the above boards for testing?

@jnohlgard jnohlgard requested a review from kYc0o July 18, 2017 07:45
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Forgot to update the documentation. Will address.

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kYc0o commented Jul 19, 2017

Great! I'll take a look asap.

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updated docs

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Relevant tests are tests/xtimer_drift and examples/gnrc_networking (for the Phytec board)

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kYc0o commented Jul 25, 2017

I just tested this without success. No example runs anymore either on mulle or frdm-k64f. I didn't test on pba-d-01-kw2x.

@jnohlgard jnohlgard force-pushed the pr/kinetis-clock-init branch from 0cf5e04 to 489b41e Compare July 28, 2017 19:26
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The problem with mulle and k64f is a configuration error. I will update this PR tomorrow, or later tonight. Also found another problem which messed up the FEI mode.

@jnohlgard jnohlgard force-pushed the pr/kinetis-clock-init branch from 489b41e to ac55f13 Compare August 1, 2017 06:26
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@kYc0o

  • Fixed the configuration error on Mulle and FRDM-K64F
  • Improved safe mode robustness
  • Fixed an issue with settings not being applied when configuring FEI mode
  • Updated all I2C timings to match the board clocks
  • Changed default Mulle core clock to 48 MHz
  • Corrected the I2C clock sources to match their respective reference manuals

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Tested I2C on Mulle and FRDM-K22F using the tests/drivers_hih6130 and the HIH6130 sensor breakout board from Sparkfun.

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@kYc0o do you mind testing on k64f? I don't have that board.
@OlegHahm @haukepetersen do you have a PhyTec board available for testing this PR?

Some KW series CPUs have no OSC module, but uses the oscillator found in
the built-in transceiver.
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kYc0o commented Aug 1, 2017

Tested on pba-d-01-kw2x (kw22d512 model) and frdm-k64f boards. Everything works as expected.

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ACK.

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kYc0o commented Aug 1, 2017

Please squash.

@jnohlgard jnohlgard force-pushed the pr/kinetis-clock-init branch from f304334 to 98bb2ce Compare August 1, 2017 14:18
@jnohlgard jnohlgard added the CI: ready for build If set, CI server will compile all applications for all available boards for the labeled PR label Aug 1, 2017
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@kYc0o squashed, waiting for Murdock

Unify cpu_init for all Kinetis CPUs to reduce code duplication.
Updated the MCG driver implementation to make the configuration easier.
Most clock settings are initialized by kinetis_mcg_init() called from
cpu_init. Board specific external clock source initialization
(FRDM-K64F, PhyNode) needs to be performed in board_init instead of
in cpu_init.
@jnohlgard jnohlgard force-pushed the pr/kinetis-clock-init branch from 98bb2ce to 742bcad Compare August 1, 2017 14:30
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kYc0o commented Aug 1, 2017

Go!

@jnohlgard jnohlgard merged commit 10e53fe into RIOT-OS:master Aug 1, 2017
@jnohlgard jnohlgard deleted the pr/kinetis-clock-init branch August 1, 2017 14:40
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3 participants