add LPCXresso LPC1769 target

connectivity/drivers/emac/TARGET_NXP_EMAC/TARGET_LPCTarget/lpc17_emac.cpp

@@ -127,7 +127,7 @@ struct lpc_enetdata {
 
 #if defined(TARGET_LPC17XX)
 #  if defined(TOOLCHAIN_GCC_ARM) || defined(TOOLCHAIN_ARM)
-#     define ETHMEM_SECTION __attribute__((section("AHBSRAM1"),aligned))
+#     define ETHMEM_SECTION __attribute__((section("AHBSRAM"), aligned(32)))
 #  endif
 #endif
 

targets/TARGET_NXP/TARGET_LPC176X/CMakeLists.txt

@@ -3,6 +3,7 @@
 
 add_subdirectory(TARGET_ARCH_PRO EXCLUDE_FROM_ALL)
 add_subdirectory(TARGET_MBED_LPC1768 EXCLUDE_FROM_ALL)
+add_subdirectory(TARGET_LPCXPRESSO_LPC1769 EXCLUDE_FROM_ALL)
 
 add_library(mbed-lpc176x INTERFACE)
 
@@ -49,3 +50,4 @@ target_link_libraries(mbed-lpc176x INTERFACE mbed-nxp)
 
 mbed_set_linker_script(mbed-arch-pro ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
 mbed_set_linker_script(mbed-lpc1768 ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
+mbed_set_linker_script(mbed-lpcxpresso-lpc1769 ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})

targets/TARGET_NXP/TARGET_LPC176X/TARGET_LPCXPRESSO_LPC1769/CMakeLists.txt

@@ -0,0 +1,15 @@
+# Copyright (c) 2021 ARM Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+include(mbed_set_post_build_nxp)
+
+add_library(mbed-lpcxpresso-lpc1769 INTERFACE)
+
+target_include_directories(mbed-lpcxpresso-lpc1769
+    INTERFACE
+        .
+)
+
+target_link_libraries(mbed-lpcxpresso-lpc1769 INTERFACE mbed-lpc176x)
+
+mbed_post_build_lpc_patch_vtable("LPC1768")

targets/TARGET_NXP/TARGET_LPC176X/TARGET_LPCXPRESSO_LPC1769/PinNames.h

@@ -0,0 +1,150 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* MBED TARGET LIST: LPC1768 */
+
+#ifndef MBED_PINNAMES_H
+#define MBED_PINNAMES_H
+
+#include "cmsis.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    PIN_INPUT,
+    PIN_OUTPUT
+} PinDirection;
+
+/* If this macro is defined, you can use constexpr utility functions for pin map search. */
+#define STATIC_PINMAP_READY 1
+
+#define PORT_SHIFT  5
+
+typedef enum {
+    // LPC Pin Names
+    P0_0 = LPC_GPIO0_BASE,
+          P0_1, P0_2, P0_3, P0_4, P0_5, P0_6, P0_7, P0_8, P0_9, P0_10, P0_11, P0_12, P0_13, P0_14, P0_15, P0_16, P0_17, P0_18, P0_19, P0_20, P0_21, P0_22, P0_23, P0_24, P0_25, P0_26, P0_27, P0_28, P0_29, P0_30, P0_31,
+    P1_0, P1_1, P1_2, P1_3, P1_4, P1_5, P1_6, P1_7, P1_8, P1_9, P1_10, P1_11, P1_12, P1_13, P1_14, P1_15, P1_16, P1_17, P1_18, P1_19, P1_20, P1_21, P1_22, P1_23, P1_24, P1_25, P1_26, P1_27, P1_28, P1_29, P1_30, P1_31,
+    P2_0, P2_1, P2_2, P2_3, P2_4, P2_5, P2_6, P2_7, P2_8, P2_9, P2_10, P2_11, P2_12, P2_13, P2_14, P2_15, P2_16, P2_17, P2_18, P2_19, P2_20, P2_21, P2_22, P2_23, P2_24, P2_25, P2_26, P2_27, P2_28, P2_29, P2_30, P2_31,
+    P3_0, P3_1, P3_2, P3_3, P3_4, P3_5, P3_6, P3_7, P3_8, P3_9, P3_10, P3_11, P3_12, P3_13, P3_14, P3_15, P3_16, P3_17, P3_18, P3_19, P3_20, P3_21, P3_22, P3_23, P3_24, P3_25, P3_26, P3_27, P3_28, P3_29, P3_30, P3_31,
+    P4_0, P4_1, P4_2, P4_3, P4_4, P4_5, P4_6, P4_7, P4_8, P4_9, P4_10, P4_11, P4_12, P4_13, P4_14, P4_15, P4_16, P4_17, P4_18, P4_19, P4_20, P4_21, P4_22, P4_23, P4_24, P4_25, P4_26, P4_27, P4_28, P4_29, P4_30, P4_31,
+
+    // mbed DIP Pin Names
+    p5 = P0_9,
+    p6 = P0_8,
+    p7 = P0_7,
+    p8 = P0_6,
+    p9 = P0_0,
+    p10 = P0_1,
+    p11 = P0_18,
+    p12 = P0_17,
+    p13 = P0_15,
+    p14 = P0_16,
+    p15 = P0_23,
+    p16 = P0_24,
+    p17 = P0_25,
+    p18 = P0_26,
+    p19 = P1_30,
+    p20 = P1_31,
+    p21 = P2_5,
+    p22 = P2_4,
+    p23 = P2_3,
+    p24 = P2_2,
+    p25 = P2_1,
+    p26 = P2_0,
+    p27 = P0_11,
+    p28 = P0_10,
+    p29 = P0_5,
+    p30 = P0_4,
+
+    CONSOLE_TX = P0_2,
+    CONSOLE_RX = P0_3,
+
+    // Arch Pro Pin Names
+    D0 = P4_29,
+    D1 = P4_28,
+    D2 = P0_4,
+    D3 = P0_5,
+    D4 = P2_2,
+    D5 = P2_3,
+    D6 = P2_4,
+    D7 = P2_5,
+    D8 = P0_0,
+    D9 = P0_1,
+    D10 = P0_6,
+    D11 = P0_9,
+    D12 = P0_8,
+    D13 = P0_7,
+    D14 = P0_27,
+    D15 = P0_28,
+
+    A0 = P0_23,
+    A1 = P0_24,
+    A2 = P0_25,
+    A3 = P0_26,
+    A4 = P1_30,
+    A5 = P1_31,
+
+    // Not connected
+    NC = (int)0xFFFFFFFF
+} PinName;
+
+// Standard buttons and LEDs
+#define LED1 P0_22  // LED1 RGB red
+#define LED2 P3_26  // LED1 RGB blue
+#define LED3 P2_25  // LED1 RGB green
+
+#define LED_RED   LED1
+#define LED_BLUE  LED2
+#define LED_GREEN LED3
+
+// I2C pin names
+#define I2C_SCL0 P0_28  // ext. pull-up 2k2 onboard
+#define I2C_SDA0 P0_27  // ext. pull-up 2k2 onboard
+#define I2C_SCL1 p10
+#define I2C_SDA1 p9
+#define I2C_SCL2 P0_11
+#define I2C_SDA2 P0_10
+#define I2C_SCL I2C_SCL0
+#define I2C_SDA I2C_SDA0
+
+typedef enum {
+    PullUp = 0,
+    PullDown = 3,
+    PullNone = 2,
+    Repeater = 1,
+    OpenDrain = 4,
+    PullDefault = PullDown
+} PinMode;
+
+// version of PINCON_TypeDef using register arrays
+typedef struct {
+  __IO uint32_t PINSEL[11];
+       uint32_t RESERVED0[5];
+  __IO uint32_t PINMODE[10];
+  __IO uint32_t PINMODE_OD[5];
+} PINCONARRAY_TypeDef;
+
+#define PINCONARRAY ((PINCONARRAY_TypeDef *)LPC_PINCON_BASE)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

targets/TARGET_NXP/TARGET_LPC176X/TARGET_LPCXPRESSO_LPC1769/device.h

@@ -0,0 +1,41 @@
+// The 'features' section in 'target.json' is now used to create the device's hardware preprocessor switches.
+// Check the 'features' section of the target description in 'targets.json' for more details.
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_DEVICE_H
+#define MBED_DEVICE_H
+
+
+
+
+
+
+
+
+
+
+
+#define DEVICE_ID_LENGTH       32
+#define DEVICE_MAC_OFFSET      20
+
+
+
+
+
+#include "objects.h"
+
+#endif

targets/TARGET_NXP/TARGET_LPC176X/TARGET_LPCXPRESSO_LPC1769/reserved_pins.h

@@ -0,0 +1,23 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2013 ARM Limited
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef RESERVED_PINS_H
+#define RESERVED_PINS_H
+
+#define TARGET_RESERVED_PINS {}
+
+#endif

targets/TARGET_NXP/USBHAL_LPC17.cpp

@@ -16,7 +16,7 @@
  */
 
 #if defined(DEVICE_USBDEVICE) && DEVICE_USBDEVICE && \
-    (defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC2460))
+    (defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC2460) || defined(TARGET_LPC17XX))
 
 #include "USBEndpoints_LPC17_LPC23.h"
 #include "USBPhyHw.h"

targets/targets.json5

@@ -494,6 +494,94 @@ mode is recommended for target MCUs with small amounts of flash and RAM.",
         },
         "image_url": "https://os.mbed.com/media/cache/platforms/LPC1768.jpg.250x250_q85.jpg"
     },
+    "MCU_LPC176X": {
+        "inherits": [
+            "LPCTarget"
+        ],
+        "public": false,
+        "core": "Cortex-M3",
+        "extra_labels": [
+            "NXP",
+            "LPC176X",
+            "NXP_EMAC"
+        ],
+        "supported_toolchains": [
+            "GCC_ARM"
+        ],
+        "macros": [
+            "MBED_SPLIT_HEAP",
+            "TARGET_LPC17XX"  // for lpc-emac and lpc-usb
+
+        ],
+        "device_has": [
+            "RTC",
+            "USTICKER",
+            "ANALOGIN",
+            "ANALOGOUT",
+            "CAN",
+            "DEBUG_AWARENESS",
+            "EMAC",
+            "I2C",
+            "I2CSLAVE",
+            "INTERRUPTIN",
+            "PORTIN",
+            "PORTINOUT",
+            "PORTOUT",
+            "PWMOUT",
+            "SERIAL",
+            "SERIAL_FC",
+            "SLEEP",
+            "SPI",
+            "SPISLAVE",
+            "FLASH",
+            "MPU",
+            "USBDEVICE",
+            "WATCHDOG",
+            "RESET_REASON"
+        ],
+        "release_versions": [
+            "5"
+        ],
+        "device_name": "LPC1768",
+        "bootloader_supported": true,
+        "config": {
+            "us-ticker-timer": {
+                "help": "Chooses which timer (0-3) to use for us_ticker.c",
+                "value": 3
+            }
+        },
+        "overrides": {
+            "network-default-interface-type": "ETHERNET",
+        },
+        "supported_c_libs": {
+            "arm": [
+                "std", "small"
+            ],
+            "gcc_arm": [
+                "std", "small"
+            ]
+        },
+        "supported_application_profiles": [
+            "full", "bare-metal"
+        ],
+        "is_mcu_family_target": true
+    },
+    "LPCXPRESSO_LPC1769": {
+        "inherits": [
+            "MCU_LPC176X"
+        ],
+        "core": "Cortex-M3",
+        "extra_labels_add": [
+            "MBED_LPC1768",
+        ],
+        "components_add": [
+            "LOCALFILESYSTEM"
+        ],
+        "overrides": {
+            "default-adc-vref": 3.3 // Vref is 3.3V
+        },
+        "image_url": "https://www.embeddedartists.com/wp-content/uploads/2018/06/lpc1769_xpr_540x333-540x333.png"
+    },
     "ARCH_PRO": {
         "supported_form_factors": [
             "ARDUINO"
@@ -3060,7 +3148,7 @@ mode is recommended for target MCUs with small amounts of flash and RAM.",
             "STM32G4A1xx"
         ]
     },
-	
+
     // STM32H5 Targets -------------------------------------------------------------------------------------------------
 	"MCU_STM32H5": {
         "inherits": [
@@ -3189,7 +3277,7 @@ mode is recommended for target MCUs with small amounts of flash and RAM.",
         "device_name": "STM32H563ZITx",
         "image_url": "https://www.st.com/bin/ecommerce/api/image.PF274337.en.feature-description-include-personalized-no-cpn-medium.jpg"
     },
-	
+
     // STM32H7 Targets -------------------------------------------------------------------------------------------------
     "MCU_STM32H7": {
         "inherits": [
@@ -3431,7 +3519,7 @@ mode is recommended for target MCUs with small amounts of flash and RAM.",
         ],
         "device_name": "STM32H745ZITx"
     },
-	
+
 	// These targets contain the extra bits to add to the MCU_STM32H745xI target to set it for the
 	// CM4 or CM7 core.
     "MCU_STM32H745xI_CM4": {