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Added VDD source for the ADC #181

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Jul 21, 2020
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9 changes: 8 additions & 1 deletion nrf-hal-common/src/saadc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -103,6 +103,8 @@ where
5 => self.0.ch[0].pselp.write(|w| w.pselp().analog_input5()),
6 => self.0.ch[0].pselp.write(|w| w.pselp().analog_input6()),
7 => self.0.ch[0].pselp.write(|w| w.pselp().analog_input7()),
#[cfg(not(feature = "9160"))]
8 => self.0.ch[0].pselp.write(|w| w.pselp().vdd()),
// This can never happen the only analog pins have already been defined
// PAY CLOSE ATTENTION TO ANY CHANGES TO THIS IMPL OR THE `channel_mappings!` MACRO
_ => unsafe { unreachable_unchecked() },
Expand Down Expand Up @@ -175,5 +177,10 @@ channel_mappings! {
4 => crate::gpio::p0::P0_28<Input<Floating>>,
5 => crate::gpio::p0::P0_29<Input<Floating>>,
6 => crate::gpio::p0::P0_30<Input<Floating>>,
7 => crate::gpio::p0::P0_31<Input<Floating>>
7 => crate::gpio::p0::P0_31<Input<Floating>>,
8 => InternalVdd
}

#[cfg(not(feature = "9160"))]
/// Channel that doesn't sample a pin, but the internal VDD voltage.
pub struct InternalVdd;