Illegal Instruction

[SeanTAllen]

I've received a couple reports via email and IRC that with 0.11.1 people are still getting "illegal instruction" errors from the prebuilt binaries that don't happen when building from source.

arch= appears to not have solved the problem or I incorrectly implemented the idea in #1663.

If you are experiencing the "illegal instruction" error when using prebuilt ponyc, please include your OS, LLVM and CPU info in this ticket.

[SeanTAllen]

Here's one report I received via email

Looks like it still needed the (AVX2?) hardware instruction.

Today I tried run pony compiler after ponyc-release package upgrade on Debian GNU/Linux:
$ ponyc
Illegal instruction

$ apt-cache policy ponyc-release
ponyc-release:
  Installed: 0.11.1-2870.922bed4
  Candidate: 0.11.1-2870.922bed4
  Version table:
 *** 0.11.1-2870.922bed4 500
        500 https://dl.bintray.com/pony-language/ponyc-debian pony-language/main amd64 Packages
        100 /var/lib/dpkg/status

$ lscpu
Architecture:          x86_64
CPU op-mode(s):        32-bit, 64-bit
Byte Order:            Little Endian
CPU(s):                4
On-line CPU(s) list:   0-3
Thread(s) per core:    1
Core(s) per socket:    4
Socket(s):             1
NUMA node(s):          1
Vendor ID:             GenuineIntel
CPU family:            6
Model:                 58
Model name:            Intel(R) Core(TM) i5-3450 CPU @ 3.10GHz
Stepping:              9
CPU MHz:               1817.253
CPU max MHz:           3500.0000
CPU min MHz:           1600.0000
BogoMIPS:              6186.03
Virtualization:        VT-x
L1d cache:             32K
L1i cache:             32K
L2 cache:              256K
L3 cache:              6144K
NUMA node0 CPU(s):     0-3
Flags:                 fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm epb tpr_shadow vnmi flexpriority ept vpid fsgsbase smep erms xsaveopt dtherm ida arat pln pts

$ gdb ponyc 
GNU gdb (Ubuntu 7.11.1-0ubuntu1~16.04) 7.11.1
Copyright (C) 2016 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law.  Type "show copying"
and "show warranty" for details.
This GDB was configured as "x86_64-linux-gnu".
Type "show configuration" for configuration details.
For bug reporting instructions, please see:
<http://www.gnu.org/software/gdb/bugs/>.
Find the GDB manual and other documentation resources online at:
<http://www.gnu.org/software/gdb/documentation/>.
For help, type "help".
Type "apropos word" to search for commands related to "word"...
Reading symbols from ponyc...(no debugging symbols found)...done.
(gdb) r
Starting program: /usr/bin/ponyc 
[Thread debugging using libthread_db enabled]
Using host libthread_db library "/lib/x86_64-linux-gnu/libthread_db.so.1".

Program received signal SIGILL, Illegal instruction.
0x00000000007167d9 in ponyint_next_pow2 ()
(gdb) bt
#0  0x00000000007167d9 in ponyint_next_pow2 ()
#1  0x000000000071691d in ponyint_hashmap_init ()
#2  0x0000000000613ec4 in main ()

[SeanTAllen]

@dipinhora pointed me to part of the conversation here: #1331 (comment)

it seems we should do arch=i686 for the broadest possible support. there is already a note for linux prebuilt packages that says you should build from source to get best performance. i think setting arch=686 makes sense and we should cut another release when that is done.

[sylvanc]

It looks like we want -march=x86-64 -mtune=intel when building for an x64 general release.

It turns out a blank arch= means the locally installed gcc will pick an architecture, depending on how it was configured, which is unpredictable for CI machines.

For now, we should be able to do arch=x86-64. We can add support for -mtune=intel later - we should only do it when building for an x64 target, as it results in tuning for whatever the locally installed gcc thinks is the "latest" Intel target. That's Haswell/Silvermont for gcc 6.3.

[sylvanc]

And yes, -march=x86-64 is indeed undocumented :)

[SeanTAllen]

I'll open a new PR for -march=x86-64 -mtune=intel

[SeanTAllen]

note to self

make arch=x86-64 is what we want but -mtune isnt currently supported by the makefile so I need to update that for that and then make the other changes.

if someone wants to beat me to it, have at it.

[SeanTAllen]

see #1686

[SeanTAllen]

This should be resolved by release of 0.11.2

I'm closing this issue an opening a new one for -mtune=intel see #1695