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Commits on Feb 6, 2022

• Change vsync timing to match CEA-861-D

  Show description for b2e5688
  

  bkoropoff

  authored and

  sameer

  committedFeb 6, 2022
  b2e5688

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Commits on Jan 27, 2022

• hdmi: allow setting start x/y with parameters

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  bkoropoff

  authored and

  sameer

  committedJan 27, 2022
  a460a3f

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Commits on Jan 26, 2022

• Allow setting IT content flag, and make it default

  Show description for 0aa47cb
  

  bkoropoff

  authored and

  sameer

  committedJan 26, 2022
  0aa47cb

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Commits on Aug 22, 2021

• Fix broken link (point to Wayback Machine)

  sameer

  authoredAug 22, 2021
  6e8b2f6

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Commits on Mar 7, 2021

• add ip-less option for non intel/xilinx

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  sameer

  committedMar 7, 2021
  803c939

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• support synchronous reset

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  sameer

  committedMar 7, 2021
  33b8a60

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• move screen to upper left corner in frame. this way, origin = screen origin (hdl-util#21)

  sameer

  authoredMar 7, 2021
  c003eba

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Commits on Mar 2, 2021

• reset oserdese2 on load

  sameer

  committedMar 2, 2021
  6198647

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Commits on Feb 28, 2021

• Update README.md

  sameer

  authoredFeb 28, 2021
  6f3ecb7

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• Xilinx support on master branch (hdl-util#20)

  Show description for 1cbde77
  sameer

  authoredFeb 28, 2021
  1cbde77

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Commits on Feb 15, 2021

• fix casting issues

  

  Piotr Bajorowicz

  authored and

  sameer

  committedFeb 15, 2021
  6502305

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Commits on Feb 11, 2021

• update platform support

  sameer

  committedFeb 11, 2021
  4d1543c

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• use altlvds_tx + oserdes2 to drive TMDS

  sameer

  committedFeb 11, 2021
  8fb9d52

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• change cache key to force re-caching

  sameer

  committedFeb 11, 2021
  44b2673

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• top testbench: don't use signed 16-bit PCM

  sameer

  committedFeb 11, 2021
  821332f

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Commits on Feb 7, 2021

• swap from travis to github actions, update modelsim

  sameer

  committedFeb 7, 2021
  01c5a84

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Commits on Feb 6, 2021

• add format 34 (1080p30)

  sameer

  committedFeb 6, 2021
  2a35976

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Commits on Jul 18, 2020

• Source tweaks for clean compilation on Verilator (hdl-util#12)

  jamesbowman

  authoredJul 18, 2020
  3214188

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Commits on May 21, 2020

• Confirm platform support for Xilinx

  sameer

  authoredMay 21, 2020
  d30ff26

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• Update README_fr.md

  sameer

  authoredMay 21, 2020
  d8e694e

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• add TB warning about out of spec CTS to make sure it happens 1x

  sameer

  committedMay 21, 2020
  697aa10

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• fix one-off for CTS counter output

  sameer

  committedMay 21, 2020
  46d98ce

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• add audio clock CTS/N sanity testbench

  sameer

  committedMay 21, 2020
  122c564

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• clean up video rate final ternary

  sameer

  committedMay 21, 2020
  c65181d

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Commits on May 17, 2020

• set exit code to 1 on fatal for travis

  sameer

  committedMay 17, 2020
  6520f04

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Commits on May 16, 2020

• reduce clock regen delay

  sameer

  committedMay 16, 2020
  15f65e8

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• correct type of clock regen N

  sameer

  committedMay 16, 2020
  a0c6d1e

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• prioritize audio clock over audio sample

  sameer

  committedMay 16, 2020
  7fc31ec

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• forgot to add i index here... need to test in top_tb

  sameer

  committedMay 16, 2020
  bb767d3

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• Add partial translation to French

  sameer

  committedMay 16, 2020
  a32dfe1

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• Update README.md

  sameer

  authoredMay 16, 2020
  6cbd029

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• ensure top_tb initial conditions are known

  sameer

  committedMay 16, 2020
  c6656ed

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• correct fatal message CTS in top_tb

  sameer

  committedMay 16, 2020
  c408430

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• 1s is too long to simulate, drop to 40ms

  sameer

  committedMay 16, 2020
  0c7991d

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• general top_tb cleanup

  sameer

  committedMay 16, 2020
  c39c2d9

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