revision_v: Update feature gates from revision v split in PAC

Upstream change in stm32-rs
stm32-rs/stm32-rs#247

Remove feature gates where they are not required.

Add new v feature targets to travis.

ADC is currently the only area where this crate differs between v and
non-v.

Revision v tracking issue
#9

.travis.yml

@@ -22,6 +22,10 @@ env:
 - MCU=stm32h743
 - MCU=stm32h753
 - MCU=stm32h750
+- MCU=stm32h742v
+- MCU=stm32h743v
+- MCU=stm32h753v
+- MCU=stm32h750v
 
 matrix:
   allow_failures:

Cargo.toml

@@ -38,12 +38,17 @@ cortex-m-log = { version = "~0.6", features = ["itm"] }
 default = ["unproven"]
 unproven = ["embedded-hal/unproven"]
 device-selected = []
+revision_v = []
 rt = ["stm32h7/rt"]
-stm32h742 = ["stm32h7/stm32h7x3", "device-selected"]
-stm32h743 = ["stm32h7/stm32h7x3", "device-selected"]
-stm32h753 = ["stm32h7/stm32h7x3", "device-selected"]
-stm32h750 = ["stm32h7/stm32h7x3", "device-selected"]
-rev_v = []
+stm32h742 = ["stm32h7/stm32h743", "device-selected"]
+stm32h743 = ["stm32h7/stm32h743", "device-selected"]
+stm32h753 = ["stm32h7/stm32h753", "device-selected"]
+stm32h750 = ["stm32h7/stm32h743", "device-selected"]
+stm32h742v = ["stm32h7/stm32h743v", "device-selected", "revision_v"]
+stm32h743v = ["stm32h7/stm32h743v", "device-selected", "revision_v"]
+stm32h753v = ["stm32h7/stm32h753v", "device-selected", "revision_v"]
+stm32h750v = ["stm32h7/stm32h743v", "device-selected", "revision_v"]
+
 
 [profile.dev]
 codegen-units = 1 # better optimizations

src/adc.rs

@@ -17,14 +17,12 @@ use crate::gpio::Analog;
 use crate::rcc::Ccdr;
 use crate::rcc::D3CCIPR;
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
+#[cfg(not(feature = "revision_y"))]
 const ADC_KER_CK_MAX: u32 = 36_000_000;
 
+#[cfg(feature = "revision_y")]
+const ADC_KER_CK_MAX: u32 = 100_000_000;
+
 pub type Resolution = crate::stm32::adc3::cfgr::RESR;
 trait NumberOfBits {
     fn number_of_bits(&self) -> u32;
@@ -205,12 +203,6 @@ pub struct Temperature;
 // Just implmenting INPx pins (INNx defaulting to V_ref-)
 //
 // Refer to DS12110 Rev 7 - Chapter 5 (Table 9)
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 adc_pins!(ADC1,
           // 0, 1 are Pxy_C pins
           PF11<Analog> => 2,
@@ -233,12 +225,6 @@ adc_pins!(ADC1,
           PA5<Analog> => 19,
 );
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 adc_pins!(ADC2,
           // 0, 1 are Pxy_C pins
           PF13<Analog> => 2,
@@ -260,12 +246,6 @@ adc_pins!(ADC2,
           PA5<Analog> => 19,
 );
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 adc_pins!(ADC3,
           // 0, 1 are Pxy_C pins
           PF9<Analog> => 2,
@@ -284,12 +264,6 @@ adc_pins!(ADC3,
           PH4<Analog> => 15,
           PH5<Analog> => 16,
 );
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 adc_internal!(
           Vbat => (17, vbaten),
           Temperature => (18, vsenseen),
@@ -460,10 +434,13 @@ macro_rules! adc_hal {
                             .discen().set_bit()
                     );
 
-                    // Enables boost mode since clock frequency > 20MHz
+                    // Enables boost mode for highest possible clock frequency
                     //
                     // Refer to RM0433 Rev 6 - Chapter 24.4.3
+                    #[cfg(not(feature = "revision_v"))]
                     self.rb.cr.modify(|_, w| w.boost().set_bit());
+                    #[cfg(feature = "revision_v")]
+                    self.rb.cr.modify(|_, w| w.boost().lt50());
                 }
 
                 /// Enable ADC

src/gpio.rs

@@ -712,12 +712,6 @@ macro_rules! gpio {
     }
 }
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 gpio!(GPIOA, gpioa, gpioaen, gpioarst, PA, 0, [
     PA0: (pa0, 0, Input<Floating>, exticr1),
     PA1: (pa1, 1, Input<Floating>, exticr1),
@@ -737,12 +731,6 @@ gpio!(GPIOA, gpioa, gpioaen, gpioarst, PA, 0, [
     PA15: (pa15, 15, Input<Floating>, exticr4),
 ]);
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 gpio!(GPIOB, gpiob, gpioben, gpiobrst, PB, 1, [
     PB0: (pb0, 0, Input<Floating>, exticr1),
     PB1: (pb1, 1, Input<Floating>, exticr1),
@@ -762,12 +750,6 @@ gpio!(GPIOB, gpiob, gpioben, gpiobrst, PB, 1, [
     PB15: (pb15, 15, Input<Floating>, exticr4),
 ]);
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 gpio!(GPIOC, gpioc, gpiocen, gpiocrst, PC, 2, [
     PC0: (pc0, 0, Input<Floating>, exticr1),
     PC1: (pc1, 1, Input<Floating>, exticr1),
@@ -787,12 +769,6 @@ gpio!(GPIOC, gpioc, gpiocen, gpiocrst, PC, 2, [
     PC15: (pc15, 15, Input<Floating>, exticr4),
 ]);
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 gpio!(GPIOD, gpiod, gpioden, gpiodrst, PD, 3, [
     PD0: (pd0, 0, Input<Floating>, exticr1),
     PD1: (pd1, 1, Input<Floating>, exticr1),
@@ -812,12 +788,6 @@ gpio!(GPIOD, gpiod, gpioden, gpiodrst, PD, 3, [
     PD15: (pd15, 15, Input<Floating>, exticr4),
 ]);
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 gpio!(GPIOE, gpioe, gpioeen, gpioerst, PE, 4, [
     PE0: (pe0, 0, Input<Floating>, exticr1),
     PE1: (pe1, 1, Input<Floating>, exticr1),
@@ -837,12 +807,6 @@ gpio!(GPIOE, gpioe, gpioeen, gpioerst, PE, 4, [
     PE15: (pe15, 15, Input<Floating>, exticr4),
 ]);
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 gpio!(GPIOF, gpiof, gpiofen, gpiofrst, PF, 5, [
     PF0: (pf0, 0, Input<Floating>, exticr1),
     PF1: (pf1, 1, Input<Floating>, exticr1),
@@ -862,12 +826,6 @@ gpio!(GPIOF, gpiof, gpiofen, gpiofrst, PF, 5, [
     PF15: (pf15, 15, Input<Floating>, exticr4),
 ]);
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 gpio!(GPIOG, gpiog, gpiogen, gpiogrst, PG, 6, [
     PG0: (pg0, 0, Input<Floating>, exticr1),
     PG1: (pg1, 1, Input<Floating>, exticr1),
@@ -887,12 +845,6 @@ gpio!(GPIOG, gpiog, gpiogen, gpiogrst, PG, 6, [
     PG15: (pg15, 15, Input<Floating>, exticr4),
 ]);
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 gpio!(GPIOH, gpioh, gpiohen, gpiohrst, PH, 7, [
     PH0: (ph0, 0, Input<Floating>, exticr1),
     PH1: (ph1, 1, Input<Floating>, exticr1),
@@ -912,12 +864,6 @@ gpio!(GPIOH, gpioh, gpiohen, gpiohrst, PH, 7, [
     PH15: (ph15, 15, Input<Floating>, exticr4),
 ]);
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 gpio!(GPIOI, gpioi, gpioien, gpioirst, PI, 8, [
     PI0: (pi0, 0, Input<Floating>, exticr1),
     PI1: (pi1, 1, Input<Floating>, exticr1),
@@ -937,12 +883,6 @@ gpio!(GPIOI, gpioi, gpioien, gpioirst, PI, 8, [
     PI15: (pi15, 15, Input<Floating>, exticr4),
 ]);
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 gpio!(GPIOJ, gpioj, gpiojen, gpiojrst, PJ, 9, [
     PJ0: (pj0, 0, Input<Floating>, exticr1),
     PJ1: (pj1, 1, Input<Floating>, exticr1),
@@ -962,12 +902,6 @@ gpio!(GPIOJ, gpioj, gpiojen, gpiojrst, PJ, 9, [
     PJ15: (pj15, 15, Input<Floating>, exticr4),
 ]);
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 gpio!(GPIOK, gpiok, gpioken, gpiokrst, PK, 10, [
     PK0: (pk0, 0, Input<Floating>, exticr1),
     PK1: (pk1, 1, Input<Floating>, exticr1),

src/i2c.rs

@@ -389,12 +389,6 @@ pins! {
         ]
 }
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 i2c!(
     I2C1: (i2c1, i2c1en, i2c1rst, apb1lenr, apb1lrstr, pclk1),
     I2C2: (i2c2, i2c2en, i2c2rst, apb1lenr, apb1lrstr, pclk1),

src/lib.rs

@@ -11,6 +11,10 @@ compile_error!(
         stm32h743
         stm32h753
         stm32h750
+        stm32h742v
+        stm32h743v
+        stm32h753v
+        stm32h750v
 "
 );
 
@@ -22,10 +26,24 @@ pub use nb::block;
 #[cfg(any(
     feature = "stm32h742",
     feature = "stm32h743",
-    feature = "stm32h753",
     feature = "stm32h750",
 ))]
-pub use stm32h7::stm32h7x3 as stm32;
+pub use stm32h7::stm32h743 as stm32;
+#[cfg(any(
+    feature = "stm32h753",
+))]
+pub use stm32h7::stm32h753 as stm32;
+#[cfg(any(
+    feature = "stm32h742v",
+    feature = "stm32h743v",
+    feature = "stm32h750v",
+))]
+pub use stm32h7::stm32h743v as stm32;
+#[cfg(any(
+    feature = "stm32h753v",
+))]
+pub use stm32h7::stm32h753v as stm32;
+
 
 #[cfg(feature = "device-selected")]
 pub use crate::stm32 as pac;

src/qei.rs

@@ -2,12 +2,6 @@
 use crate::hal::{self, Direction};
 use crate::rcc::Ccdr;
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 use crate::gpio::gpioa::{PA0, PA1, PA15, PA5, PA6, PA7, PA8, PA9};
 use crate::gpio::gpiob::{PB0, PB13, PB14, PB3, PB4, PB5, PB6, PB7};
 use crate::gpio::gpioc::{PC6, PC7};
@@ -20,30 +14,12 @@ use crate::gpio::gpiok::{PK0, PK1};
 
 use crate::gpio::Alternate;
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 use crate::gpio::AF1;
 use crate::gpio::AF2;
 use crate::gpio::AF3;
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 use crate::stm32::{TIM1, TIM8};
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 use crate::stm32::{TIM2, TIM3, TIM4, TIM5};
 
 pub trait Pins<TIM> {}
@@ -70,12 +46,6 @@ macro_rules! pins {
     }
 }
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750",
-))]
 pins! {
     TIM1:
         CH1: [
@@ -245,12 +215,6 @@ macro_rules! tim_hal {
     }
 }
 
-#[cfg(any(
-    feature = "stm32h742",
-    feature = "stm32h743",
-    feature = "stm32h753",
-    feature = "stm32h750"
-))]
 tim_hal! {
     TIM1: (tim1, apb2, enr, rstr, tim1en, tim1rst, u16),
     TIM8: (tim8, apb2, enr, rstr, tim8en, tim8rst, u16),

src/rcc.rs

@@ -582,12 +582,6 @@ impl Rcc {
         // Refer to part datasheet "General operating conditions"
         // table for (rev V). We do not assert checks for earlier
         // revisions which may have lower limits.
-        #[cfg(any(
-            feature = "stm32h742",
-            feature = "stm32h743",
-            feature = "stm32h753",
-            feature = "stm32h750"
-        ))]
         let (sys_d1cpre_ck_max, rcc_hclk_max, pclk_max) = match vos {
             Voltage::Scale0 => (480_000_000, 240_000_000, 120_000_000),
             Voltage::Scale1 => (400_000_000, 200_000_000, 100_000_000),