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Merge #19 #26 #27 #28 #31
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19: timers, bugfix: fix periodic CountDown timer r=richardeoin a=richardeoin

Previously the `CountDown` timer failed to start a new countdown if the periodic timer was running and no `wait()` call was made in the previous period. This was as the UIF bit was already set.

See embedded-hal docs for the contract:
https://docs.rs/embedded-hal/0.2.3/embedded_hal/timer/trait.CountDown.html#tymethod.start

Add  example to demonstrate correct behaviour.

26: rcc: add options to configure more PLL outputs r=richardeoin a=richardeoin

* All 3 outputs of PLL1 can be configured.
* Moving closer to a generic interface for PLL2/PLL3; just needs macro
  definitions and call to setup.
* An `assert` will occour if pll1_p_ck is set independently when it is
  requried for sys_ck.
* When `pll1_r_ck` is `None` in the configuration struct, it is set if
  required to keep `traceclk` running. Afaict there's no documentation
  on acceptable frequencies for `traceclk`, set p_ck/2 as a sensible
  choice (can be overridden by setting some `pll1_r_ck`).

27: Init traits prelude r=richardeoin a=richardeoin

adc: Add initialisation trait

Simplifies usage:

```rust
let _ = adc::Adc::adc3(dp.ADC3, &mut delay, &mut ccdr);
```
to
```rust
let _ = dp.ADC3.adc(&mut delay, &mut ccdr);
```

Previous method still works.

Re-work arguments for timer, doesn't break anything as there aren't any examples yet.

Closes #20 

28: Porting i2c to the extension trait pattern r=richardeoin a=hargoniX

See #27 

31: dependencies: use stm32h7 PAC 0.8 r=richardeoin a=jordens

* remove and warnings notes on using the local build of stm32h7
* bump cortex-m-rt to 0.6.10 (.ARM.exidx section)
* mention that this works with beta

close: #5 

Co-authored-by: Richard Meadows <[email protected]>
Co-authored-by: Henrik Böving <[email protected]>
Co-authored-by: Robert Jördens <[email protected]>
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4 people committed Jul 29, 2019
6 parents 8b9d4cc + 106b3fd + 97c58f4 + 6fee6af + 6096232 + fe6b3a0 commit 6a7b25d
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18 changes: 0 additions & 18 deletions .github/force-pac-master.sh

This file was deleted.

1 change: 0 additions & 1 deletion .travis.yml
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Expand Up @@ -15,7 +15,6 @@ branches:

before_script:
- rustup target add thumbv7em-none-eabihf
- ./.github/force-pac-master.sh

env:
- MCU=stm32h742
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4 changes: 2 additions & 2 deletions Cargo.toml
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Expand Up @@ -21,8 +21,8 @@ features = ["stm32h743", "rt"]
[dependencies]
embedded-hal = "0.2.3"
cortex-m = "^0.6.0"
cortex-m-rt = "0.6.8"
stm32h7 = { path = "/your/path/here/stm32-rs/stm32h7" }
cortex-m-rt = "0.6.10"
stm32h7 = "0.8.0"
void = { version = "1.0.2", default-features = false }
cast = { version = "0.2.2", default-features = false }
nb = "0.1.2"
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15 changes: 1 addition & 14 deletions README.md
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Expand Up @@ -6,9 +6,7 @@ are pull requests!**

🚧 *Work in progress*

*Nightly required*

📂 *[Local dependancy required](#Hacking)*
*Beta or nightly required*

`stm32h7xx-hal` contains a hardware abstraction on top of the
peripheral access API for the STMicro STM32H7 series
Expand Down Expand Up @@ -72,17 +70,6 @@ Run an Example

This will start `arm-none-eabi-gdb`.

Hacking
--------

TODO: Remove this section when it no longer applies!

To build this crate you will need the HEAD of [`stm32h7`][] built
locally. You will need to download
[`stm32-rs/stm32-rs`](https://github.com/stm32-rs/stm32-rs) locally
and follow the instructions in [the
README](https://github.com/stm32-rs/stm32-rs#generating-device-crates--building-locally).

License
--------

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66 changes: 66 additions & 0 deletions examples/blinky_timer.rs
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@@ -0,0 +1,66 @@
#![deny(warnings)]
#![deny(unsafe_code)]
#![no_main]
#![no_std]

extern crate panic_itm;

#[macro_use(block)]
extern crate nb;

use cortex_m;
use cortex_m_rt::entry;
use stm32h7xx_hal::hal::digital::v2::{OutputPin, ToggleableOutputPin};
use stm32h7xx_hal::{pac, prelude::*};

use cortex_m_log::println;
use cortex_m_log::{
destination::Itm, printer::itm::InterruptSync as InterruptSyncItm,
};

#[entry]
fn main() -> ! {
let cp = cortex_m::Peripherals::take().unwrap();
let dp = pac::Peripherals::take().unwrap();
let mut log = InterruptSyncItm::new(Itm::new(cp.ITM));

// Constrain and Freeze power
println!(log, "Setup PWR... ");
let pwr = dp.PWR.constrain();
let vos = pwr.freeze();

// Constrain and Freeze clock
println!(log, "Setup RCC... ");
let rcc = dp.RCC.constrain();
let mut ccdr = rcc.freeze(vos, &dp.SYSCFG);

println!(log, "");
println!(log, "stm32h7xx-hal example - Blinky timer");
println!(log, "");

let gpioe = dp.GPIOE.split(&mut ccdr.ahb4);

// Configure PE1 as output.
let mut led = gpioe.pe1.into_push_pull_output();
led.set_low().unwrap();

// Get the delay provider.
let mut delay = cp.SYST.delay(ccdr.clocks);

// Configure the timer.
let mut timer = dp.TIM2.timer(1.hz(), &mut ccdr);

loop {
for _ in 0..5 {
// 20ms wait with timer
led.toggle().unwrap();
timer.start(20.ms());
block!(timer.wait()).ok();

// Delay for 500ms. Timer must operate correctly on next
// use.
led.toggle().unwrap();
delay.delay_ms(500_u16);
}
}
}
11 changes: 5 additions & 6 deletions examples/i2c.rs
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Expand Up @@ -3,7 +3,7 @@

extern crate panic_itm;

use stm32h7xx_hal::{i2c::I2c, pac, prelude::*};
use stm32h7xx_hal::{pac, prelude::*};

use cortex_m_rt::entry;

Expand Down Expand Up @@ -33,13 +33,12 @@ fn main() -> ! {
let scl = gpiob.pb8.into_alternate_af4().set_open_drain();
let sda = gpiob.pb9.into_alternate_af4().set_open_drain();

let mut i2c = I2c::i2c1(dp.I2C1, (scl, sda), 100.khz(), &ccdr);
let mut i2c = dp.I2C1.i2c((scl, sda), 100.khz(), &ccdr);

// Echo what is received on the I2C at register 0x11 and addr 0x10
// It is expected to get 2 bytes as response here
let mut buf = [0x11, 0x0];
// Echo what is received on the I2C at register 0x60
let mut buf = [0x60];
loop {
buf[0] = 0x11;
i2c.write_read(0x10, &buf.clone(), &mut buf).ok();
i2c.write_read(0x76, &buf.clone(), &mut buf).unwrap();
}
}
5 changes: 4 additions & 1 deletion examples/spi.rs
Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,10 @@ fn main() -> ! {
// Constrain and Freeze clock
println!(log, "Setup RCC... ");
let rcc = dp.RCC.constrain();
let mut ccdr = rcc.sys_ck(96.mhz()).freeze(vos, &dp.SYSCFG);
let mut ccdr = rcc
.sys_ck(96.mhz())
.pll1_q_ck(48.mhz())
.freeze(vos, &dp.SYSCFG);

// Acquire the GPIOC peripheral. This also enables the clock for
// GPIOC in the RCC register.
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13 changes: 13 additions & 0 deletions src/adc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -270,6 +270,10 @@ adc_internal!(
Vrefint => (19, vrefen)
);

pub trait AdcExt<ADC>: Sized {
fn adc(self, delay: &mut Delay, ccdr: &mut Ccdr) -> Adc<ADC, Disabled>;
}

/// Stored ADC config can be restored using the `Adc::restore_cfg` method
#[derive(Copy, Clone, Debug, PartialEq)]
pub struct StoredConfig(AdcSampleTime, Resolution, AdcLshift);
Expand Down Expand Up @@ -308,6 +312,15 @@ macro_rules! adc_hal {
)
),+ $(,)*) => {
$(
impl AdcExt<$ADC> for $ADC {
fn adc(self,
delay: &mut Delay,
ccdr: &mut Ccdr) -> Adc<$ADC, Disabled>
{
Adc::$adcX(self, delay, ccdr)
}
}

impl Adc<$ADC, Disabled> {
/// Initialise ADC
///
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45 changes: 40 additions & 5 deletions src/i2c.rs
Original file line number Diff line number Diff line change
Expand Up @@ -34,11 +34,33 @@ pub unsafe trait PinScl<I2C> {}
/// A trait to represent the SDL Pin of an I2C Port
pub unsafe trait PinSda<I2C> {}

pub trait Pins<I2C> {}

impl<I2C, SCL, SDA> Pins<I2C> for (SCL, SDA)
where
SCL: PinScl<I2C>,
SDA: PinSda<I2C>,
{
}

#[derive(Debug)]
pub struct I2c<I2C, PINS> {
i2c: I2C,
pins: PINS,
}

pub trait I2cExt<I2C>: Sized {
fn i2c<PINS, F>(
self,
pins: PINS,
freq: F,
ccdr: &Ccdr
) -> I2c<I2C, PINS>
where
PINS: Pins<I2C>,
F: Into<Hertz>;
}

macro_rules! busy_wait {
($i2c:expr, $flag:ident) => {
loop {
Expand All @@ -60,17 +82,16 @@ macro_rules! busy_wait {
macro_rules! i2c {
($($I2CX:ident: ($i2cX:ident, $i2cXen:ident, $i2cXrst:ident, $apbXenr:ident, $apbXrstr:ident, $pclkX:ident),)+) => {
$(
impl<SCL, SDA> I2c<$I2CX, (SCL, SDA)> {
impl<PINS> I2c<$I2CX, PINS> {
/// Basically a new function for an I2C peripheral
pub fn $i2cX<F> (
i2c: $I2CX,
pins: (SCL, SDA),
pins: PINS,
freq: F,
ccdr: &Ccdr
) -> Self where
F: Into<Hertz>,
SCL: PinScl<$I2CX>,
SDA: PinSda<$I2CX>,
PINS: Pins<$I2CX>,
{
ccdr.rb.$apbXenr.modify(|_, w| w.$i2cXen().set_bit());
ccdr.rb.$apbXrstr.modify(|_, w| w.$i2cXrst().set_bit());
Expand Down Expand Up @@ -166,10 +187,24 @@ macro_rules! i2c {
}

/// Releases the I2C peripheral and associated pins
pub fn free(self) -> ($I2CX, (SCL, SDA)) {
pub fn free(self) -> ($I2CX, PINS) {
(self.i2c, self.pins)
}
}

impl I2cExt<$I2CX> for $I2CX {
fn i2c<PINS, F>(self,
pins:PINS,
freq:F,
ccdr: &Ccdr) -> I2c<$I2CX, PINS>
where
PINS: Pins<$I2CX>,
F: Into<Hertz>
{
I2c::$i2cX(self, pins, freq, ccdr)
}
}

impl<PINS> Write for I2c<$I2CX, PINS> {
type Error = Error;

Expand Down
3 changes: 3 additions & 0 deletions src/prelude.rs
Original file line number Diff line number Diff line change
@@ -1,9 +1,11 @@
//! Prelude
pub use embedded_hal::prelude::*;

pub use crate::adc::AdcExt as _stm32h7xx_hal_adc_AdcExt;
pub use crate::delay::DelayExt as _stm32h7xx_hal_delay_DelayExt;
pub use crate::flash::FlashExt as _stm32h7xx_hal_flash_FlashExt;
pub use crate::gpio::GpioExt as _stm32h7xx_hal_gpio_GpioExt;
pub use crate::i2c::I2cExt as _stm32h7xx_hal_i2c_I2cExt;
pub use crate::pwm::PwmExt as _stm32_hal_pwm_PwmExt;
pub use crate::pwr::PwrExt as _stm32h7xx_hal_pwr_PwrExt;
pub use crate::rcc::RccExt as _stm32h7xx_hal_rcc_RccExt;
Expand All @@ -12,3 +14,4 @@ pub use crate::rng::RngExt as _stm32h7xx_hal_rng_RngExt;
pub use crate::serial::SerialExt as _stm32h7xx_hal_serial_SerialExt;
pub use crate::spi::SpiExt as _stm32h7xx_hal_spi_SpiExt;
pub use crate::time::U32Ext as _stm32h7xx_hal_time_U32Ext;
pub use crate::timer::TimerExt as _stm32h7xx_hal_timer_TimerExt;
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